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ARM: OMAP2+: Drop legacy platform data for omap4 mcbsp
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -86,7 +86,6 @@
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target-module@22000 { /* 0x40122000, ap 2 02.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mcbsp1";
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reg = <0x2208c 0x4>;
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reg-names = "sysc";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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@ -120,7 +119,6 @@
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target-module@24000 { /* 0x40124000, ap 4 04.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mcbsp2";
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reg = <0x2408c 0x4>;
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reg-names = "sysc";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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@ -154,7 +152,6 @@
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target-module@26000 { /* 0x40126000, ap 6 06.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mcbsp3";
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reg = <0x2608c 0x4>;
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reg-names = "sysc";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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@ -2013,7 +2013,6 @@
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target-module@96000 { /* 0x48096000, ap 37 26.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mcbsp4";
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reg = <0x9608c 0x4>;
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reg-names = "sysc";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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@ -1324,113 +1324,6 @@ static struct omap_hwmod omap44xx_mcasp_hwmod = {
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},
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};
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/*
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* 'mcbsp' class
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* multi channel buffered serial port controller
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
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.rev_offs = -ENODEV,
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.sysc_offs = 0x008c,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
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.name = "mcbsp",
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.sysc = &omap44xx_mcbsp_sysc,
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};
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/* mcbsp1 */
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static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
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{ .role = "pad_fck", .clk = "pad_clks_ck" },
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{ .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
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};
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static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
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.name = "mcbsp1",
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.class = &omap44xx_mcbsp_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "func_mcbsp1_gfclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.opt_clks = mcbsp1_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks),
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};
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/* mcbsp2 */
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static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
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{ .role = "pad_fck", .clk = "pad_clks_ck" },
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{ .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
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};
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static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
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.name = "mcbsp2",
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.class = &omap44xx_mcbsp_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "func_mcbsp2_gfclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.opt_clks = mcbsp2_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks),
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};
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/* mcbsp3 */
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static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
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{ .role = "pad_fck", .clk = "pad_clks_ck" },
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{ .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
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};
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static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
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.name = "mcbsp3",
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.class = &omap44xx_mcbsp_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.main_clk = "func_mcbsp3_gfclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.opt_clks = mcbsp3_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks),
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};
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/* mcbsp4 */
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static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
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{ .role = "pad_fck", .clk = "pad_clks_ck" },
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{ .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
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};
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static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
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.name = "mcbsp4",
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.class = &omap44xx_mcbsp_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.main_clk = "per_mcbsp4_gfclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.opt_clks = mcbsp4_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks),
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};
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/*
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* 'mcpdm' class
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* multi channel pdm controller (proprietary interface with phoenix power
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@ -2938,38 +2831,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcasp_dma = {
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.user = OCP_USER_SDMA,
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};
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/* l4_abe -> mcbsp1 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_mcbsp1_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> mcbsp2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_mcbsp2_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> mcbsp3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_mcbsp3_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mcbsp4 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_mcbsp4_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> mcpdm */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
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.master = &omap44xx_l4_abe_hwmod,
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@ -3308,10 +3169,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_wkup__kbd,
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&omap44xx_l4_abe__mcasp,
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&omap44xx_l4_abe__mcasp_dma,
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&omap44xx_l4_abe__mcbsp1,
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&omap44xx_l4_abe__mcbsp2,
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&omap44xx_l4_abe__mcbsp3,
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&omap44xx_l4_per__mcbsp4,
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&omap44xx_l4_abe__mcpdm,
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&omap44xx_l3_main_2__mmu_ipu,
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&omap44xx_l4_cfg__mmu_dsp,
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