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iommu/vt-d: Use cmpxchg16b to update posted format IRTE atomically
If IRTE is in posted format, the 'pda' field goes across the 64-bit boundary, we need use cmpxchg16b to atomically update it. We only expose posted-interrupt when X86_FEATURE_CX16 is supported and use to update it atomically. Signed-off-by: Feng Wu <feng.wu@intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -169,8 +169,26 @@ static int modify_irte(struct irq_2_iommu *irq_iommu,
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index = irq_iommu->irte_index + irq_iommu->sub_handle;
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irte = &iommu->ir_table->base[index];
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set_64bit(&irte->low, irte_modified->low);
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set_64bit(&irte->high, irte_modified->high);
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#if defined(CONFIG_HAVE_CMPXCHG_DOUBLE)
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if ((irte->pst == 1) || (irte_modified->pst == 1)) {
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bool ret;
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ret = cmpxchg_double(&irte->low, &irte->high,
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irte->low, irte->high,
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irte_modified->low, irte_modified->high);
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/*
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* We use cmpxchg16 to atomically update the 128-bit IRTE,
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* and it cannot be updated by the hardware or other processors
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* behind us, so the return value of cmpxchg16 should be the
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* same as the old value.
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*/
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WARN_ON(!ret);
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} else
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#endif
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{
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set_64bit(&irte->low, irte_modified->low);
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set_64bit(&irte->high, irte_modified->high);
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}
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__iommu_flush_cache(iommu, irte, sizeof(*irte));
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rc = qi_flush_iec(iommu, index, 0);
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@ -727,7 +745,16 @@ static inline void set_irq_posting_cap(void)
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struct intel_iommu *iommu;
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if (!disable_irq_post) {
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intel_irq_remap_ops.capability |= 1 << IRQ_POSTING_CAP;
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/*
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* If IRTE is in posted format, the 'pda' field goes across the
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* 64-bit boundary, we need use cmpxchg16b to atomically update
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* it. We only expose posted-interrupt when X86_FEATURE_CX16
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* is supported. Actually, hardware platforms supporting PI
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* should have X86_FEATURE_CX16 support, this has been confirmed
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* with Intel hardware guys.
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*/
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if ( cpu_has_cx16 )
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intel_irq_remap_ops.capability |= 1 << IRQ_POSTING_CAP;
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for_each_iommu(iommu, drhd)
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if (!cap_pi_support(iommu->cap)) {
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