mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-24 03:24:55 +08:00
drm/nouveau/fb: remove dependence on namedb/engctx lookup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
898a2b3213
commit
344c2d429d
@ -9,6 +9,7 @@ struct nvkm_fifo_chan {
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u64 addr;
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u32 size;
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u16 chid;
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u64 inst;
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};
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static inline struct nvkm_fifo_chan *
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@ -81,6 +82,13 @@ struct nvkm_fifo {
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void (*start)(struct nvkm_fifo *, unsigned long *);
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};
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void nvkm_fifo_chan_put(struct nvkm_fifo *, unsigned long flags,
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struct nvkm_fifo_chan **);
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struct nvkm_fifo_chan *
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nvkm_fifo_chan_inst(struct nvkm_fifo *, u64 inst, unsigned long *flags);
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struct nvkm_fifo_chan *
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nvkm_fifo_chan_chid(struct nvkm_fifo *, int chid, unsigned long *flags);
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static inline struct nvkm_fifo *
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nvkm_fifo(void *obj)
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{
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@ -32,6 +32,47 @@
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#include <nvif/event.h>
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#include <nvif/unpack.h>
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void
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nvkm_fifo_chan_put(struct nvkm_fifo *fifo, unsigned long flags,
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struct nvkm_fifo_chan **pchan)
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{
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struct nvkm_fifo_chan *chan = *pchan;
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if (likely(chan)) {
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*pchan = NULL;
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spin_unlock_irqrestore(&fifo->lock, flags);
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}
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}
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struct nvkm_fifo_chan *
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nvkm_fifo_chan_inst(struct nvkm_fifo *fifo, u64 inst, unsigned long *rflags)
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{
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unsigned long flags;
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int i;
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spin_lock_irqsave(&fifo->lock, flags);
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for (i = fifo->min; i < fifo->max; i++) {
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struct nvkm_fifo_chan *chan = (void *)fifo->channel[i];
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if (chan && chan->inst == inst) {
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*rflags = flags;
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return chan;
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}
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}
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spin_unlock_irqrestore(&fifo->lock, flags);
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return NULL;
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}
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struct nvkm_fifo_chan *
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nvkm_fifo_chan_chid(struct nvkm_fifo *fifo, int chid, unsigned long *rflags)
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{
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unsigned long flags;
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spin_lock_irqsave(&fifo->lock, flags);
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if (fifo->channel[chid]) {
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*rflags = flags;
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return (void *)fifo->channel[chid];
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}
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spin_unlock_irqrestore(&fifo->lock, flags);
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return NULL;
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}
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static int
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nvkm_fifo_event_ctor(struct nvkm_object *object, void *data, u32 size,
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struct nvkm_notify *notify)
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@ -207,6 +207,7 @@ g84_fifo_chan_ctor_dma(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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ret = nvkm_ramht_new(device, 0x8000, 16, &base->base.gpuobj,
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@ -285,6 +286,7 @@ g84_fifo_chan_ctor_ind(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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ret = nvkm_ramht_new(device, 0x8000, 16, &base->base.gpuobj,
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@ -226,6 +226,7 @@ gf100_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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nv_parent(chan)->context_attach = gf100_fifo_context_attach;
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@ -283,6 +283,7 @@ gk104_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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nv_parent(chan)->context_attach = gk104_fifo_context_attach;
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@ -225,6 +225,7 @@ nv50_fifo_chan_ctor_dma(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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nv_parent(chan)->context_attach = nv50_fifo_context_attach;
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@ -291,6 +292,7 @@ nv50_fifo_chan_ctor_ind(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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chan->base.inst = base->base.gpuobj.addr;
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args->v0.chid = chan->base.chid;
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nv_parent(chan)->context_attach = nv50_fifo_context_attach;
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@ -25,8 +25,8 @@
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#include "ram.h"
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#include <core/client.h>
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#include <core/engctx.h>
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#include <core/enum.h>
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#include <engine/fifo.h>
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int
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nv50_fb_memtype[0x80] = {
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@ -47,98 +47,98 @@ nv50_fb_memtype_valid(struct nvkm_fb *fb, u32 memtype)
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}
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static const struct nvkm_enum vm_dispatch_subclients[] = {
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{ 0x00000000, "GRCTX", NULL },
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{ 0x00000001, "NOTIFY", NULL },
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{ 0x00000002, "QUERY", NULL },
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{ 0x00000003, "COND", NULL },
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{ 0x00000004, "M2M_IN", NULL },
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{ 0x00000005, "M2M_OUT", NULL },
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{ 0x00000006, "M2M_NOTIFY", NULL },
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{ 0x00000000, "GRCTX" },
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{ 0x00000001, "NOTIFY" },
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{ 0x00000002, "QUERY" },
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{ 0x00000003, "COND" },
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{ 0x00000004, "M2M_IN" },
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{ 0x00000005, "M2M_OUT" },
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{ 0x00000006, "M2M_NOTIFY" },
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{}
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};
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static const struct nvkm_enum vm_ccache_subclients[] = {
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{ 0x00000000, "CB", NULL },
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{ 0x00000001, "TIC", NULL },
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{ 0x00000002, "TSC", NULL },
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{ 0x00000000, "CB" },
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{ 0x00000001, "TIC" },
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{ 0x00000002, "TSC" },
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{}
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};
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static const struct nvkm_enum vm_prop_subclients[] = {
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{ 0x00000000, "RT0", NULL },
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{ 0x00000001, "RT1", NULL },
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{ 0x00000002, "RT2", NULL },
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{ 0x00000003, "RT3", NULL },
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{ 0x00000004, "RT4", NULL },
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{ 0x00000005, "RT5", NULL },
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{ 0x00000006, "RT6", NULL },
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{ 0x00000007, "RT7", NULL },
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{ 0x00000008, "ZETA", NULL },
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{ 0x00000009, "LOCAL", NULL },
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{ 0x0000000a, "GLOBAL", NULL },
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{ 0x0000000b, "STACK", NULL },
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{ 0x0000000c, "DST2D", NULL },
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{ 0x00000000, "RT0" },
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{ 0x00000001, "RT1" },
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{ 0x00000002, "RT2" },
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{ 0x00000003, "RT3" },
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{ 0x00000004, "RT4" },
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{ 0x00000005, "RT5" },
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{ 0x00000006, "RT6" },
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{ 0x00000007, "RT7" },
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{ 0x00000008, "ZETA" },
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{ 0x00000009, "LOCAL" },
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{ 0x0000000a, "GLOBAL" },
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{ 0x0000000b, "STACK" },
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{ 0x0000000c, "DST2D" },
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{}
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};
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static const struct nvkm_enum vm_pfifo_subclients[] = {
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{ 0x00000000, "PUSHBUF", NULL },
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{ 0x00000001, "SEMAPHORE", NULL },
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{ 0x00000000, "PUSHBUF" },
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{ 0x00000001, "SEMAPHORE" },
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{}
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};
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static const struct nvkm_enum vm_bar_subclients[] = {
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{ 0x00000000, "FB", NULL },
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{ 0x00000001, "IN", NULL },
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{ 0x00000000, "FB" },
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{ 0x00000001, "IN" },
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{}
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};
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static const struct nvkm_enum vm_client[] = {
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{ 0x00000000, "STRMOUT", NULL },
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{ 0x00000000, "STRMOUT" },
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{ 0x00000003, "DISPATCH", vm_dispatch_subclients },
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{ 0x00000004, "PFIFO_WRITE", NULL },
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{ 0x00000004, "PFIFO_WRITE" },
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{ 0x00000005, "CCACHE", vm_ccache_subclients },
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{ 0x00000006, "PMSPPP", NULL },
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{ 0x00000007, "CLIPID", NULL },
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{ 0x00000008, "PFIFO_READ", NULL },
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{ 0x00000009, "VFETCH", NULL },
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{ 0x0000000a, "TEXTURE", NULL },
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{ 0x00000006, "PMSPPP" },
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{ 0x00000007, "CLIPID" },
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{ 0x00000008, "PFIFO_READ" },
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{ 0x00000009, "VFETCH" },
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{ 0x0000000a, "TEXTURE" },
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{ 0x0000000b, "PROP", vm_prop_subclients },
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{ 0x0000000c, "PVP", NULL },
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{ 0x0000000d, "PBSP", NULL },
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{ 0x0000000e, "PCRYPT", NULL },
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{ 0x0000000f, "PCOUNTER", NULL },
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{ 0x00000011, "PDAEMON", NULL },
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{ 0x0000000c, "PVP" },
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{ 0x0000000d, "PBSP" },
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{ 0x0000000e, "PCRYPT" },
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{ 0x0000000f, "PCOUNTER" },
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{ 0x00000011, "PDAEMON" },
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{}
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};
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static const struct nvkm_enum vm_engine[] = {
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{ 0x00000000, "PGRAPH", NULL, NVDEV_ENGINE_GR },
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{ 0x00000001, "PVP", NULL, NVDEV_ENGINE_VP },
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{ 0x00000004, "PEEPHOLE", NULL },
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{ 0x00000005, "PFIFO", vm_pfifo_subclients, NVDEV_ENGINE_FIFO },
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{ 0x00000000, "PGRAPH" },
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{ 0x00000001, "PVP" },
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{ 0x00000004, "PEEPHOLE" },
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{ 0x00000005, "PFIFO", vm_pfifo_subclients },
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{ 0x00000006, "BAR", vm_bar_subclients },
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{ 0x00000008, "PMSPPP", NULL, NVDEV_ENGINE_MSPPP },
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{ 0x00000008, "PMPEG", NULL, NVDEV_ENGINE_MPEG },
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{ 0x00000009, "PBSP", NULL, NVDEV_ENGINE_BSP },
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{ 0x0000000a, "PCRYPT", NULL, NVDEV_ENGINE_CIPHER },
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{ 0x0000000b, "PCOUNTER", NULL },
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{ 0x0000000c, "SEMAPHORE_BG", NULL },
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{ 0x0000000d, "PCE0", NULL, NVDEV_ENGINE_CE0 },
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{ 0x0000000e, "PDAEMON", NULL },
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{ 0x00000008, "PMSPPP" },
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{ 0x00000008, "PMPEG" },
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{ 0x00000009, "PBSP" },
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{ 0x0000000a, "PCRYPT" },
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{ 0x0000000b, "PCOUNTER" },
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{ 0x0000000c, "SEMAPHORE_BG" },
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{ 0x0000000d, "PCE0" },
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{ 0x0000000e, "PDAEMON" },
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{}
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};
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static const struct nvkm_enum vm_fault[] = {
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{ 0x00000000, "PT_NOT_PRESENT", NULL },
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{ 0x00000001, "PT_TOO_SHORT", NULL },
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{ 0x00000002, "PAGE_NOT_PRESENT", NULL },
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{ 0x00000003, "PAGE_SYSTEM_ONLY", NULL },
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{ 0x00000004, "PAGE_READ_ONLY", NULL },
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{ 0x00000006, "NULL_DMAOBJ", NULL },
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{ 0x00000007, "WRONG_MEMTYPE", NULL },
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{ 0x0000000b, "VRAM_LIMIT", NULL },
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{ 0x0000000f, "DMAOBJ_LIMIT", NULL },
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{ 0x00000000, "PT_NOT_PRESENT" },
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{ 0x00000001, "PT_TOO_SHORT" },
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{ 0x00000002, "PAGE_NOT_PRESENT" },
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{ 0x00000003, "PAGE_SYSTEM_ONLY" },
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{ 0x00000004, "PAGE_READ_ONLY" },
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{ 0x00000006, "NULL_DMAOBJ" },
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{ 0x00000007, "WRONG_MEMTYPE" },
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{ 0x0000000b, "VRAM_LIMIT" },
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{ 0x0000000f, "DMAOBJ_LIMIT" },
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{}
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};
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@ -147,11 +147,12 @@ nv50_fb_intr(struct nvkm_subdev *subdev)
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{
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struct nv50_fb *fb = (void *)subdev;
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struct nvkm_device *device = fb->base.subdev.device;
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struct nvkm_engine *engine;
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struct nvkm_fifo *fifo = device->fifo;
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struct nvkm_fifo_chan *chan;
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const struct nvkm_enum *en, *re, *cl, *sc;
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struct nvkm_object *engctx = NULL;
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u32 trap[6], idx, chan;
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u32 trap[6], idx, inst;
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u8 st0, st1, st2, st3;
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unsigned long flags;
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int i;
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idx = nvkm_rd32(device, 0x100c90);
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@ -178,48 +179,25 @@ nv50_fb_intr(struct nvkm_subdev *subdev)
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st2 = (trap[0] & 0x00ff0000) >> 16;
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st3 = (trap[0] & 0xff000000) >> 24;
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}
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chan = (trap[2] << 16) | trap[1];
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inst = ((trap[2] << 16) | trap[1]) << 12;
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en = nvkm_enum_find(vm_engine, st0);
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if (en && en->data2) {
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const struct nvkm_enum *orig_en = en;
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while (en->name && en->value == st0 && en->data2) {
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engine = nvkm_engine(subdev, en->data2);
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/*XXX: clean this up */
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if (!engine && en->data2 == NVDEV_ENGINE_BSP)
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engine = nvkm_engine(subdev, NVDEV_ENGINE_MSVLD);
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if (!engine && en->data2 == NVDEV_ENGINE_CIPHER)
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engine = nvkm_engine(subdev, NVDEV_ENGINE_SEC);
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if (!engine && en->data2 == NVDEV_ENGINE_VP)
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engine = nvkm_engine(subdev, NVDEV_ENGINE_MSPDEC);
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if (engine) {
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engctx = nvkm_engctx_get(engine, chan);
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if (engctx)
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break;
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}
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en++;
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}
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if (!engctx)
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en = orig_en;
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}
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re = nvkm_enum_find(vm_fault , st1);
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cl = nvkm_enum_find(vm_client, st2);
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if (cl && cl->data) sc = nvkm_enum_find(cl->data, st3);
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else if (en && en->data) sc = nvkm_enum_find(en->data, st3);
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else sc = NULL;
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chan = nvkm_fifo_chan_inst(fifo, inst, &flags);
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nvkm_error(subdev, "trapped %s at %02x%04x%04x on channel "
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"%08x [%s] engine %02x [%s] client %02x [%s] "
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"subclient %02x [%s] reason %08x [%s]\n",
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(trap[5] & 0x00000100) ? "read" : "write",
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trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff, chan,
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nvkm_client_name(engctx), st0, en ? en->name : "",
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trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff, inst,
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nvkm_client_name(chan), st0, en ? en->name : "",
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st2, cl ? cl->name : "", st3, sc ? sc->name : "",
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st1, re ? re->name : "");
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nvkm_engctx_put(engctx);
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nvkm_fifo_chan_put(fifo, flags, &chan);
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}
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int
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