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ASoC: WM8804: Initial driver
The WM8804 is a high performance consumer mode S/PDIF transceiver with support for 1 received channel and 1 transmitted channel. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Dimitris Papastamos
Mark Brown
parent
6b90b55ccc
commit
33cf45c80f
@ -56,6 +56,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_WM8750 if SND_SOC_I2C_AND_SPI
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select SND_SOC_WM8753 if SND_SOC_I2C_AND_SPI
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select SND_SOC_WM8776 if SND_SOC_I2C_AND_SPI
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select SND_SOC_WM8804 if SND_SOC_I2C_AND_SPI
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select SND_SOC_WM8900 if I2C
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select SND_SOC_WM8903 if I2C
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select SND_SOC_WM8904 if I2C
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@ -237,6 +238,9 @@ config SND_SOC_WM8753
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config SND_SOC_WM8776
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tristate
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config SND_SOC_WM8804
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tristate
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config SND_SOC_WM8900
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tristate
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@ -41,6 +41,7 @@ snd-soc-wm8741-objs := wm8741.o
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snd-soc-wm8750-objs := wm8750.o
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snd-soc-wm8753-objs := wm8753.o
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snd-soc-wm8776-objs := wm8776.o
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snd-soc-wm8804-objs := wm8804.o
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snd-soc-wm8900-objs := wm8900.o
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snd-soc-wm8903-objs := wm8903.o
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snd-soc-wm8904-objs := wm8904.o
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@ -114,6 +115,7 @@ obj-$(CONFIG_SND_SOC_WM8741) += snd-soc-wm8741.o
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obj-$(CONFIG_SND_SOC_WM8750) += snd-soc-wm8750.o
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obj-$(CONFIG_SND_SOC_WM8753) += snd-soc-wm8753.o
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obj-$(CONFIG_SND_SOC_WM8776) += snd-soc-wm8776.o
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obj-$(CONFIG_SND_SOC_WM8804) += snd-soc-wm8804.o
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obj-$(CONFIG_SND_SOC_WM8900) += snd-soc-wm8900.o
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obj-$(CONFIG_SND_SOC_WM8903) += snd-soc-wm8903.o
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obj-$(CONFIG_SND_SOC_WM8904) += snd-soc-wm8904.o
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820
sound/soc/codecs/wm8804.c
Normal file
820
sound/soc/codecs/wm8804.c
Normal file
@ -0,0 +1,820 @@
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/*
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* wm8804.c -- WM8804 S/PDIF transceiver driver
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*
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* Copyright 2010 Wolfson Microelectronics plc
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*
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* Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8804.h"
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#define WM8804_NUM_SUPPLIES 2
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static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = {
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"PVDD",
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"DVDD"
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};
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static const u8 wm8804_reg_defs[] = {
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0x05, /* R0 - RST/DEVID1 */
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0x88, /* R1 - DEVID2 */
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0x04, /* R2 - DEVREV */
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0x21, /* R3 - PLL1 */
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0xFD, /* R4 - PLL2 */
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0x36, /* R5 - PLL3 */
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0x07, /* R6 - PLL4 */
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0x16, /* R7 - PLL5 */
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0x18, /* R8 - PLL6 */
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0xFF, /* R9 - SPDMODE */
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0x00, /* R10 - INTMASK */
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0x00, /* R11 - INTSTAT */
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0x00, /* R12 - SPDSTAT */
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0x00, /* R13 - RXCHAN1 */
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0x00, /* R14 - RXCHAN2 */
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0x00, /* R15 - RXCHAN3 */
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0x00, /* R16 - RXCHAN4 */
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0x00, /* R17 - RXCHAN5 */
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0x00, /* R18 - SPDTX1 */
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0x00, /* R19 - SPDTX2 */
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0x00, /* R20 - SPDTX3 */
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0x71, /* R21 - SPDTX4 */
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0x0B, /* R22 - SPDTX5 */
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0x70, /* R23 - GPO0 */
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0x57, /* R24 - GPO1 */
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0x00, /* R25 */
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0x42, /* R26 - GPO2 */
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0x06, /* R27 - AIFTX */
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0x06, /* R28 - AIFRX */
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0x80, /* R29 - SPDRX1 */
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0x07, /* R30 - PWRDN */
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};
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struct wm8804_priv {
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enum snd_soc_control_type control_type;
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struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES];
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struct notifier_block disable_nb[WM8804_NUM_SUPPLIES];
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struct snd_soc_codec *codec;
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};
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static int txsrc_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol);
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static int txsrc_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol);
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/*
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* We can't use the same notifier block for more than one supply and
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* there's no way I can see to get from a callback to the caller
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* except container_of().
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*/
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#define WM8804_REGULATOR_EVENT(n) \
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static int wm8804_regulator_event_##n(struct notifier_block *nb, \
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unsigned long event, void *data) \
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{ \
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struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \
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disable_nb[n]); \
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if (event & REGULATOR_EVENT_DISABLE) { \
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wm8804->codec->cache_sync = 1; \
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} \
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return 0; \
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}
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WM8804_REGULATOR_EVENT(0)
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WM8804_REGULATOR_EVENT(1)
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static const char *txsrc_text[] = { "S/PDIF RX", "AIF" };
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static const SOC_ENUM_SINGLE_EXT_DECL(txsrc, txsrc_text);
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static const struct snd_kcontrol_new wm8804_snd_controls[] = {
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SOC_ENUM_EXT("Input Source", txsrc, txsrc_get, txsrc_put),
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SOC_SINGLE("TX Playback Switch", WM8804_PWRDN, 2, 1, 1),
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SOC_SINGLE("AIF Playback Switch", WM8804_PWRDN, 4, 1, 1)
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};
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static int txsrc_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec;
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unsigned int src;
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codec = snd_kcontrol_chip(kcontrol);
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src = snd_soc_read(codec, WM8804_SPDTX4);
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if (src & 0x40)
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ucontrol->value.integer.value[0] = 1;
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else
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ucontrol->value.integer.value[0] = 0;
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return 0;
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}
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static int txsrc_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec;
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unsigned int src, txpwr;
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codec = snd_kcontrol_chip(kcontrol);
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if (ucontrol->value.integer.value[0] != 0
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&& ucontrol->value.integer.value[0] != 1)
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return -EINVAL;
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src = snd_soc_read(codec, WM8804_SPDTX4);
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switch ((src & 0x40) >> 6) {
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case 0:
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if (!ucontrol->value.integer.value[0])
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return 0;
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break;
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case 1:
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if (ucontrol->value.integer.value[1])
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return 0;
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break;
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}
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/* save the current power state of the transmitter */
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txpwr = snd_soc_read(codec, WM8804_PWRDN) & 0x4;
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/* power down the transmitter */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x4);
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/* set the tx source */
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snd_soc_update_bits(codec, WM8804_SPDTX4, 0x40,
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ucontrol->value.integer.value[0] << 6);
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if (ucontrol->value.integer.value[0]) {
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/* power down the receiver */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0x2);
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/* power up the AIF */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x10, 0);
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} else {
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/* don't power down the AIF -- may be used as an output */
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/* power up the receiver */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0);
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}
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/* restore the transmitter's configuration */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, txpwr);
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return 0;
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}
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static int wm8804_volatile(unsigned int reg)
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{
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switch (reg) {
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case WM8804_RST_DEVID1:
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case WM8804_DEVID2:
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case WM8804_DEVREV:
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case WM8804_INTSTAT:
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case WM8804_SPDSTAT:
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case WM8804_RXCHAN1:
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case WM8804_RXCHAN2:
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case WM8804_RXCHAN3:
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case WM8804_RXCHAN4:
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case WM8804_RXCHAN5:
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return 1;
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default:
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break;
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}
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return 0;
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}
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static int wm8804_reset(struct snd_soc_codec *codec)
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{
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return snd_soc_write(codec, WM8804_RST_DEVID1, 0x0);
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}
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static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec;
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u16 format, master, bcp, lrp;
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codec = dai->codec;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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format = 0x2;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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format = 0x0;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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format = 0x1;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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case SND_SOC_DAIFMT_DSP_B:
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format = 0x3;
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break;
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default:
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dev_err(dai->dev, "Unknown dai format\n");
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return -EINVAL;
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}
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/* set data format */
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snd_soc_update_bits(codec, WM8804_AIFTX, 0x3, format);
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snd_soc_update_bits(codec, WM8804_AIFRX, 0x3, format);
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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master = 1;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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master = 0;
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break;
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default:
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dev_err(dai->dev, "Unknown master/slave configuration\n");
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return -EINVAL;
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}
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/* set master/slave mode */
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snd_soc_update_bits(codec, WM8804_AIFRX, 0x40, master << 6);
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bcp = lrp = 0;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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case SND_SOC_DAIFMT_IB_IF:
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bcp = lrp = 1;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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bcp = 1;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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lrp = 1;
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break;
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default:
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dev_err(dai->dev, "Unknown polarity configuration\n");
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return -EINVAL;
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}
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/* set frame inversion */
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snd_soc_update_bits(codec, WM8804_AIFTX, 0x10 | 0x20,
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(bcp << 4) | (lrp << 5));
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snd_soc_update_bits(codec, WM8804_AIFRX, 0x10 | 0x20,
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(bcp << 4) | (lrp << 5));
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return 0;
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}
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static int wm8804_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec;
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u16 blen;
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codec = dai->codec;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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blen = 0x0;
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break;
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case SNDRV_PCM_FORMAT_S20_3LE:
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blen = 0x1;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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blen = 0x2;
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break;
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default:
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dev_err(dai->dev, "Unsupported word length: %u\n",
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params_format(params));
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return -EINVAL;
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}
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/* set word length */
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snd_soc_update_bits(codec, WM8804_AIFTX, 0xc, blen << 2);
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snd_soc_update_bits(codec, WM8804_AIFRX, 0xc, blen << 2);
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return 0;
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}
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struct pll_div {
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u32 prescale:1;
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u32 mclkdiv:1;
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u32 freqmode:2;
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u32 n:4;
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u32 k:22;
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};
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/* PLL rate to output rate divisions */
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static struct {
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unsigned int div;
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unsigned int freqmode;
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unsigned int mclkdiv;
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} post_table[] = {
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{ 2, 0, 0 },
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{ 4, 0, 1 },
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{ 4, 1, 0 },
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{ 8, 1, 1 },
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{ 8, 2, 0 },
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{ 16, 2, 1 },
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{ 12, 3, 0 },
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{ 24, 3, 1 }
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};
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#define FIXED_PLL_SIZE ((1ULL << 22) * 10)
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static int pll_factors(struct pll_div *pll_div, unsigned int target,
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unsigned int source)
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{
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u64 Kpart;
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unsigned long int K, Ndiv, Nmod, tmp;
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int i;
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/*
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* Scale the output frequency up; the PLL should run in the
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* region of 90-100MHz.
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*/
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for (i = 0; i < ARRAY_SIZE(post_table); i++) {
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tmp = target * post_table[i].div;
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if (tmp >= 90000000 && tmp <= 100000000) {
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pll_div->freqmode = post_table[i].freqmode;
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pll_div->mclkdiv = post_table[i].mclkdiv;
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target *= post_table[i].div;
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break;
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}
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}
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if (i == ARRAY_SIZE(post_table)) {
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pr_err("%s: Unable to scale output frequency: %uHz\n",
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__func__, target);
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return -EINVAL;
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}
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pll_div->prescale = 0;
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Ndiv = target / source;
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if (Ndiv < 5) {
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source >>= 1;
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pll_div->prescale = 1;
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Ndiv = target / source;
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}
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if (Ndiv < 5 || Ndiv > 13) {
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pr_err("%s: WM8804 N value is not within the recommended range: %lu\n",
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__func__, Ndiv);
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return -EINVAL;
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}
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pll_div->n = Ndiv;
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Nmod = target % source;
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Kpart = FIXED_PLL_SIZE * (u64)Nmod;
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do_div(Kpart, source);
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K = Kpart & 0xffffffff;
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if ((K % 10) >= 5)
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K += 5;
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K /= 10;
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pll_div->k = K;
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return 0;
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}
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static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
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int source, unsigned int freq_in,
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unsigned int freq_out)
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{
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int ret;
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struct snd_soc_codec *codec;
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struct pll_div pll_div = { 0 };
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codec = dai->codec;
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if (freq_in && freq_out) {
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ret = pll_factors(&pll_div, freq_out, freq_in);
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if (ret)
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return ret;
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}
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/* power down the PLL before reprogramming it */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
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if (!freq_in || !freq_out)
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return 0;
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/* set PLLN and PRESCALE */
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snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10,
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pll_div.n | (pll_div.prescale << 4));
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/* set mclkdiv and freqmode */
|
||||
snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8,
|
||||
pll_div.freqmode | (pll_div.mclkdiv << 3));
|
||||
/* set PLLK */
|
||||
snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff);
|
||||
snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff);
|
||||
snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16);
|
||||
|
||||
/* power up the PLL */
|
||||
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8804_set_sysclk(struct snd_soc_dai *dai,
|
||||
int clk_id, unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec;
|
||||
|
||||
codec = dai->codec;
|
||||
|
||||
switch (clk_id) {
|
||||
case WM8804_TX_CLKSRC_MCLK:
|
||||
if ((freq >= 10000000 && freq <= 14400000)
|
||||
|| (freq >= 16280000 && freq <= 27000000))
|
||||
snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0x80);
|
||||
else {
|
||||
dev_err(dai->dev, "OSCCLOCK is not within the "
|
||||
"recommended range: %uHz\n", freq);
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
case WM8804_TX_CLKSRC_PLL:
|
||||
snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0);
|
||||
break;
|
||||
case WM8804_CLKOUT_SRC_CLK1:
|
||||
snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0);
|
||||
break;
|
||||
case WM8804_CLKOUT_SRC_OSCCLK:
|
||||
snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0x8);
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8804_set_clkdiv(struct snd_soc_dai *dai,
|
||||
int div_id, int div)
|
||||
{
|
||||
struct snd_soc_codec *codec;
|
||||
|
||||
codec = dai->codec;
|
||||
switch (div_id) {
|
||||
case WM8804_CLKOUT_DIV:
|
||||
snd_soc_update_bits(codec, WM8804_PLL5, 0x30,
|
||||
(div & 0x3) << 4);
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unknown clock divider: %d\n", div_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void wm8804_sync_cache(struct snd_soc_codec *codec)
|
||||
{
|
||||
short i;
|
||||
u8 *cache;
|
||||
|
||||
if (!codec->cache_sync)
|
||||
return;
|
||||
|
||||
codec->cache_only = 0;
|
||||
cache = codec->reg_cache;
|
||||
for (i = 0; i < codec->driver->reg_cache_size; i++) {
|
||||
if (i == WM8804_RST_DEVID1 || cache[i] == wm8804_reg_defs[i])
|
||||
continue;
|
||||
snd_soc_write(codec, i, cache[i]);
|
||||
}
|
||||
codec->cache_sync = 0;
|
||||
}
|
||||
|
||||
static int wm8804_set_bias_level(struct snd_soc_codec *codec,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
int ret;
|
||||
struct wm8804_priv *wm8804;
|
||||
|
||||
wm8804 = snd_soc_codec_get_drvdata(codec);
|
||||
switch (level) {
|
||||
case SND_SOC_BIAS_ON:
|
||||
break;
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
/* power up the OSC and the PLL */
|
||||
snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
|
||||
break;
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (codec->bias_level == SND_SOC_BIAS_OFF) {
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
|
||||
wm8804->supplies);
|
||||
if (ret) {
|
||||
dev_err(codec->dev,
|
||||
"Failed to enable supplies: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
wm8804_sync_cache(codec);
|
||||
}
|
||||
/* power down the OSC and the PLL */
|
||||
snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
|
||||
break;
|
||||
case SND_SOC_BIAS_OFF:
|
||||
/* power down the OSC and the PLL */
|
||||
snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies),
|
||||
wm8804->supplies);
|
||||
break;
|
||||
}
|
||||
|
||||
codec->bias_level = level;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int wm8804_suspend(struct snd_soc_codec *codec, pm_message_t state)
|
||||
{
|
||||
wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8804_resume(struct snd_soc_codec *codec)
|
||||
{
|
||||
wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define wm8804_suspend NULL
|
||||
#define wm8804_resume NULL
|
||||
#endif
|
||||
|
||||
static int wm8804_remove(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8804_priv *wm8804;
|
||||
int i;
|
||||
|
||||
wm8804 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i)
|
||||
regulator_unregister_notifier(wm8804->supplies[i].consumer,
|
||||
&wm8804->disable_nb[i]);
|
||||
regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8804_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8804_priv *wm8804;
|
||||
int i, id1, id2, ret;
|
||||
|
||||
wm8804 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8804->codec = codec;
|
||||
|
||||
codec->idle_bias_off = 1;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, wm8804->control_type);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
|
||||
wm8804->supplies[i].supply = wm8804_supply_names[i];
|
||||
|
||||
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies),
|
||||
wm8804->supplies);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0;
|
||||
wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1;
|
||||
|
||||
/* This should really be moved into the regulator core */
|
||||
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) {
|
||||
ret = regulator_register_notifier(wm8804->supplies[i].consumer,
|
||||
&wm8804->disable_nb[i]);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev,
|
||||
"Failed to register regulator notifier: %d\n",
|
||||
ret);
|
||||
}
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
|
||||
wm8804->supplies);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
|
||||
goto err_reg_get;
|
||||
}
|
||||
|
||||
id1 = snd_soc_read(codec, WM8804_RST_DEVID1);
|
||||
if (id1 < 0) {
|
||||
dev_err(codec->dev, "Failed to read device ID: %d\n", id1);
|
||||
ret = id1;
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
id2 = snd_soc_read(codec, WM8804_DEVID2);
|
||||
if (id2 < 0) {
|
||||
dev_err(codec->dev, "Failed to read device ID: %d\n", id2);
|
||||
ret = id2;
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
id2 = (id2 << 8) | id1;
|
||||
|
||||
if (id2 != ((wm8804_reg_defs[WM8804_DEVID2] << 8)
|
||||
| wm8804_reg_defs[WM8804_RST_DEVID1])) {
|
||||
dev_err(codec->dev, "Invalid device ID: %#x\n", id2);
|
||||
ret = -EINVAL;
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
ret = wm8804_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
snd_soc_add_controls(codec, wm8804_snd_controls,
|
||||
ARRAY_SIZE(wm8804_snd_controls));
|
||||
return 0;
|
||||
|
||||
err_reg_enable:
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
|
||||
err_reg_get:
|
||||
regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct snd_soc_dai_ops wm8804_dai_ops = {
|
||||
.hw_params = wm8804_hw_params,
|
||||
.set_fmt = wm8804_set_fmt,
|
||||
.set_sysclk = wm8804_set_sysclk,
|
||||
.set_clkdiv = wm8804_set_clkdiv,
|
||||
.set_pll = wm8804_set_pll
|
||||
};
|
||||
|
||||
#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
|
||||
SNDRV_PCM_FMTBIT_S24_LE)
|
||||
|
||||
static struct snd_soc_dai_driver wm8804_dai = {
|
||||
.name = "wm8804-s/pdif",
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.rates = SNDRV_PCM_RATE_8000_192000,
|
||||
.formats = WM8804_FORMATS,
|
||||
},
|
||||
.capture = {
|
||||
.stream_name = "Capture",
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.rates = SNDRV_PCM_RATE_8000_192000,
|
||||
.formats = WM8804_FORMATS,
|
||||
},
|
||||
.ops = &wm8804_dai_ops,
|
||||
.symmetric_rates = 1
|
||||
};
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_wm8804 = {
|
||||
.probe = wm8804_probe,
|
||||
.remove = wm8804_remove,
|
||||
.suspend = wm8804_suspend,
|
||||
.resume = wm8804_resume,
|
||||
.set_bias_level = wm8804_set_bias_level,
|
||||
.reg_cache_size = ARRAY_SIZE(wm8804_reg_defs),
|
||||
.reg_word_size = sizeof(u8),
|
||||
.reg_cache_default = wm8804_reg_defs,
|
||||
.volatile_register = wm8804_volatile
|
||||
};
|
||||
|
||||
#if defined(CONFIG_SPI_MASTER)
|
||||
static int __devinit wm8804_spi_probe(struct spi_device *spi)
|
||||
{
|
||||
struct wm8804_priv *wm8804;
|
||||
int ret;
|
||||
|
||||
wm8804 = kzalloc(sizeof *wm8804, GFP_KERNEL);
|
||||
if (IS_ERR(wm8804))
|
||||
return PTR_ERR(wm8804);
|
||||
|
||||
wm8804->control_type = SND_SOC_SPI;
|
||||
spi_set_drvdata(spi, wm8804);
|
||||
|
||||
ret = snd_soc_register_codec(&spi->dev,
|
||||
&soc_codec_dev_wm8804, &wm8804_dai, 1);
|
||||
if (ret < 0)
|
||||
kfree(wm8804);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit wm8804_spi_remove(struct spi_device *spi)
|
||||
{
|
||||
snd_soc_unregister_codec(&spi->dev);
|
||||
kfree(spi_get_drvdata(spi));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct spi_driver wm8804_spi_driver = {
|
||||
.driver = {
|
||||
.name = "wm8804",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = wm8804_spi_probe,
|
||||
.remove = __devexit_p(wm8804_spi_remove)
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
||||
static __devinit int wm8804_i2c_probe(struct i2c_client *i2c,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct wm8804_priv *wm8804;
|
||||
int ret;
|
||||
|
||||
wm8804 = kzalloc(sizeof *wm8804, GFP_KERNEL);
|
||||
if (IS_ERR(wm8804))
|
||||
return PTR_ERR(wm8804);
|
||||
|
||||
wm8804->control_type = SND_SOC_I2C;
|
||||
i2c_set_clientdata(i2c, wm8804);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8804, &wm8804_dai, 1);
|
||||
if (ret < 0)
|
||||
kfree(wm8804);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static __devexit int wm8804_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
kfree(i2c_get_clientdata(client));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8804_i2c_id[] = {
|
||||
{ "wm8804", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, wm8804_i2c_id);
|
||||
|
||||
static struct i2c_driver wm8804_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "wm8804",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = wm8804_i2c_probe,
|
||||
.remove = __devexit_p(wm8804_i2c_remove),
|
||||
.id_table = wm8804_i2c_id
|
||||
};
|
||||
#endif
|
||||
|
||||
static int __init wm8804_modinit(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
||||
ret = i2c_add_driver(&wm8804_i2c_driver);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
#if defined(CONFIG_SPI_MASTER)
|
||||
ret = spi_register_driver(&wm8804_spi_driver);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR "Failed to register wm8804 SPI driver: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
module_init(wm8804_modinit);
|
||||
|
||||
static void __exit wm8804_exit(void)
|
||||
{
|
||||
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
||||
i2c_del_driver(&wm8804_i2c_driver);
|
||||
#endif
|
||||
#if defined(CONFIG_SPI_MASTER)
|
||||
spi_unregister_driver(&wm8804_spi_driver);
|
||||
#endif
|
||||
}
|
||||
module_exit(wm8804_exit);
|
||||
|
||||
MODULE_DESCRIPTION("ASoC WM8804 driver");
|
||||
MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
61
sound/soc/codecs/wm8804.h
Normal file
61
sound/soc/codecs/wm8804.h
Normal file
@ -0,0 +1,61 @@
|
||||
/*
|
||||
* wm8804.h -- WM8804 S/PDIF transceiver driver
|
||||
*
|
||||
* Copyright 2010 Wolfson Microelectronics plc
|
||||
*
|
||||
* Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _WM8804_H
|
||||
#define _WM8804_H
|
||||
|
||||
/*
|
||||
* Register values.
|
||||
*/
|
||||
#define WM8804_RST_DEVID1 0x00
|
||||
#define WM8804_DEVID2 0x01
|
||||
#define WM8804_DEVREV 0x02
|
||||
#define WM8804_PLL1 0x03
|
||||
#define WM8804_PLL2 0x04
|
||||
#define WM8804_PLL3 0x05
|
||||
#define WM8804_PLL4 0x06
|
||||
#define WM8804_PLL5 0x07
|
||||
#define WM8804_PLL6 0x08
|
||||
#define WM8804_SPDMODE 0x09
|
||||
#define WM8804_INTMASK 0x0A
|
||||
#define WM8804_INTSTAT 0x0B
|
||||
#define WM8804_SPDSTAT 0x0C
|
||||
#define WM8804_RXCHAN1 0x0D
|
||||
#define WM8804_RXCHAN2 0x0E
|
||||
#define WM8804_RXCHAN3 0x0F
|
||||
#define WM8804_RXCHAN4 0x10
|
||||
#define WM8804_RXCHAN5 0x11
|
||||
#define WM8804_SPDTX1 0x12
|
||||
#define WM8804_SPDTX2 0x13
|
||||
#define WM8804_SPDTX3 0x14
|
||||
#define WM8804_SPDTX4 0x15
|
||||
#define WM8804_SPDTX5 0x16
|
||||
#define WM8804_GPO0 0x17
|
||||
#define WM8804_GPO1 0x18
|
||||
#define WM8804_GPO2 0x1A
|
||||
#define WM8804_AIFTX 0x1B
|
||||
#define WM8804_AIFRX 0x1C
|
||||
#define WM8804_SPDRX1 0x1D
|
||||
#define WM8804_PWRDN 0x1E
|
||||
|
||||
#define WM8804_REGISTER_COUNT 30
|
||||
#define WM8804_MAX_REGISTER 0x1E
|
||||
|
||||
#define WM8804_TX_CLKSRC_MCLK 1
|
||||
#define WM8804_TX_CLKSRC_PLL 2
|
||||
|
||||
#define WM8804_CLKOUT_SRC_CLK1 3
|
||||
#define WM8804_CLKOUT_SRC_OSCCLK 4
|
||||
|
||||
#define WM8804_CLKOUT_DIV 1
|
||||
|
||||
#endif /* _WM8804_H */
|
||||
Loading…
Reference in New Issue
Block a user