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arm64: dts: stratix10: add USB ECC reset bit
The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted as well for the USB IP to work properly. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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@ -335,8 +335,8 @@
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interrupts = <0 93 4>;
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interrupts = <0 93 4>;
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phys = <&usbphy0>;
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phys = <&usbphy0>;
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phy-names = "usb2-phy";
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phy-names = "usb2-phy";
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resets = <&rst USB0_RESET>;
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resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
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reset-names = "dwc2";
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reset-names = "dwc2", "dwc2-ecc";
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status = "disabled";
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status = "disabled";
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};
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};
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@ -346,8 +346,8 @@
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interrupts = <0 94 4>;
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interrupts = <0 94 4>;
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phys = <&usbphy0>;
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phys = <&usbphy0>;
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phy-names = "usb2-phy";
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phy-names = "usb2-phy";
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resets = <&rst USB1_RESET>;
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resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>;
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reset-names = "dwc2";
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reset-names = "dwc2", "dwc2-ecc";
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status = "disabled";
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status = "disabled";
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};
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};
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