ARM: fix co-processor register typo

In the recent Spectre BHB patches, there was a typo that is only
exposed in certain configurations: mcr p15,0,XX,c7,r5,4 should have
been mcr p15,0,XX,c7,c5,4

Reported-by: kernel test robot <lkp@intel.com>
Fixes: b9baf5c8c5 ("ARM: Spectre-BHB workaround")
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Russell King (Oracle) 2022-03-09 19:08:42 +00:00 committed by Linus Torvalds
parent 330f4c53d3
commit 33970b031d

View File

@ -113,7 +113,7 @@
.endm
.macro isb, args
mcr p15, 0, r0, c7, r5, 4
mcr p15, 0, r0, c7, c5, 4
.endm
#endif