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clk: samsung: exynos3250: Move PLL rates data to init section

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The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Krzysztof Kozlowski 2016-05-11 14:12:16 +02:00 committed by Sylwester Nawrocki
parent 4dbf01b8df
commit 334393366f
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/samsung/clk-exynos3250.c
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@ -669,7 +669,7 @@ static const struct samsung_gate_clock gate_clks[] __initconst = {
};
/* APLL & MPLL & BPLL & UPLL */
static const struct samsung_pll_rate_table exynos3250_pll_rates[] = {
static const struct samsung_pll_rate_table exynos3250_pll_rates[] __initconst = {
PLL_35XX_RATE(1200000000, 400, 4, 1),
PLL_35XX_RATE(1100000000, 275, 3, 1),
PLL_35XX_RATE(1066000000, 533, 6, 1),
@ -691,7 +691,7 @@ static const struct samsung_pll_rate_table exynos3250_pll_rates[] = {
};
/* EPLL */
static const struct samsung_pll_rate_table exynos3250_epll_rates[] = {
static const struct samsung_pll_rate_table exynos3250_epll_rates[] __initconst = {
PLL_36XX_RATE(800000000, 200, 3, 1, 0),
PLL_36XX_RATE(288000000, 96, 2, 2, 0),
PLL_36XX_RATE(192000000, 128, 2, 3, 0),