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mtd: rawnand: Get rid of chip->numchips

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The same information is provided by nanddev_ntargets().

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This commit is contained in:
Boris Brezillon 2018-10-29 11:58:29 +01:00 committed by Miquel Raynal
parent 6c836d515f
commit 32813e2884
9 changed files with 20 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/mtd/nand/raw/diskonchip.c
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@ -1291,7 +1291,7 @@ static int __init inftl_scan_bbt(struct mtd_info *mtd)
struct doc_priv *doc = nand_get_controller_data(this);
struct mtd_partition parts[5];
if (this->numchips > doc->chips_per_floor) {
if (nanddev_ntargets(&this->base) > doc->chips_per_floor) {
pr_err("Multi-floor INFTL devices not yet supported.\n");
return -EIO;
}

2
drivers/mtd/nand/raw/fsl_elbc_nand.c
View File

@ -653,7 +653,7 @@ static int fsl_elbc_attach_chip(struct nand_chip *chip)
priv->fmr |= al << FMR_AL_SHIFT;
dev_dbg(priv->dev, "fsl_elbc_init: nand->numchips = %d\n",
chip->numchips);
nanddev_ntargets(&chip->base));
dev_dbg(priv->dev, "fsl_elbc_init: nand->chipsize = %lld\n",
nanddev_target_size(&chip->base));
dev_dbg(priv->dev, "fsl_elbc_init: nand->pagemask = %8x\n",

2
drivers/mtd/nand/raw/fsl_ifc_nand.c
View File

@ -722,7 +722,7 @@ static int fsl_ifc_attach_chip(struct nand_chip *chip)
struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
dev_dbg(priv->dev, "%s: nand->numchips = %d\n", __func__,
chip->numchips);
nanddev_ntargets(&chip->base));
dev_dbg(priv->dev, "%s: nand->chipsize = %lld\n", __func__,
nanddev_target_size(&chip->base));
dev_dbg(priv->dev, "%s: nand->pagemask = %8x\n", __func__,

2
drivers/mtd/nand/raw/hisi504_nand.c
View File

@ -849,7 +849,7 @@ static int hisi_nfc_resume(struct device *dev)
struct hinfc_host *host = dev_get_drvdata(dev);
struct nand_chip *chip = &host->chip;
for (cs = 0; cs < chip->numchips; cs++)
for (cs = 0; cs < nanddev_ntargets(&chip->base); cs++)
hisi_nfc_send_cmd_reset(host, cs);
hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH,
HINFC504_R_LATCH, HINFC504_RW_LATCH), HINFC504_PWIDTH);

1
drivers/mtd/nand/raw/ingenic/jz4740_nand.c
View File

@ -354,7 +354,6 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
}
/* Update size of the MTD. */
chip->numchips++;
memorg->ntargets++;
mtd->size += nanddev_target_size(&chip->base);
}

2
drivers/mtd/nand/raw/internals.h
View File

@ -110,7 +110,7 @@ static inline int nand_exec_op(struct nand_chip *chip,
if (!nand_has_exec_op(chip))
return -ENOTSUPP;
if (WARN_ON(op->cs >= chip->numchips))
if (WARN_ON(op->cs >= nanddev_ntargets(&chip->base)))
return -EINVAL;
return chip->controller->ops->exec_op(chip, op, false);

15
drivers/mtd/nand/raw/nand_base.c
View File

@ -240,10 +240,10 @@ static int check_offs_len(struct nand_chip *chip, loff_t ofs, uint64_t len)
void nand_select_target(struct nand_chip *chip, unsigned int cs)
{
/*
* cs should always lie between 0 and chip->numchips, when that's not
* the case it's a bug and the caller should be fixed.
* cs should always lie between 0 and nanddev_ntargets(), when that's
* not the case it's a bug and the caller should be fixed.
*/
if (WARN_ON(cs > chip->numchips))
if (WARN_ON(cs > nanddev_ntargets(&chip->base)))
return;
chip->cur_cs = cs;
@ -4999,12 +4999,6 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
if (!mtd->name && mtd->dev.parent)
mtd->name = dev_name(mtd->dev.parent);
/*
* Start with chips->numchips = maxchips to let nand_select_target() do
* its job. chip->numchips will be adjusted after.
*/
chip->numchips = maxchips;
/* Set the default functions */
nand_set_defaults(chip);
@ -5052,7 +5046,6 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
/* Store the number of chips and calc total size for mtd */
memorg->ntargets = i;
chip->numchips = i;
mtd->size = i * nanddev_target_size(&chip->base);
return 0;
@ -5794,7 +5787,7 @@ static int nand_scan_tail(struct nand_chip *chip)
goto err_nanddev_cleanup;
/* Enter fastest possible mode on all dies. */
for (i = 0; i < chip->numchips; i++) {
for (i = 0; i < nanddev_ntargets(&chip->base); i++) {
ret = nand_setup_data_interface(chip, i);
if (ret)
goto err_nanddev_cleanup;

16
drivers/mtd/nand/raw/nand_bbt.c
View File

@ -269,7 +269,7 @@ static int read_abs_bbt(struct nand_chip *this, uint8_t *buf,
if (td->options & NAND_BBT_PERCHIP) {
int offs = 0;
for (i = 0; i < this->numchips; i++) {
for (i = 0; i < nanddev_ntargets(&this->base); i++) {
if (chip == -1 || chip == i)
res = read_bbt(this, buf, td->pages[i],
targetsize >> this->bbt_erase_shift,
@ -478,9 +478,9 @@ static int create_bbt(struct nand_chip *this, uint8_t *buf,
startblock = 0;
from = 0;
} else {
if (chip >= this->numchips) {
if (chip >= nanddev_ntargets(&this->base)) {
pr_warn("create_bbt(): chipnr (%d) > available chips (%d)\n",
chip + 1, this->numchips);
chip + 1, nanddev_ntargets(&this->base));
return -EINVAL;
}
numblocks = targetsize >> this->bbt_erase_shift;
@ -550,7 +550,7 @@ static int search_bbt(struct nand_chip *this, uint8_t *buf,
/* Do we have a bbt per chip? */
if (td->options & NAND_BBT_PERCHIP) {
chips = this->numchips;
chips = nanddev_ntargets(&this->base);
bbtblocks = targetsize >> this->bbt_erase_shift;
startblock &= bbtblocks - 1;
} else {
@ -643,7 +643,7 @@ static int get_bbt_block(struct nand_chip *this, struct nand_bbt_descr *td,
numblocks = (int)(targetsize >> this->bbt_erase_shift);
if (!(td->options & NAND_BBT_PERCHIP))
numblocks *= this->numchips;
numblocks *= nanddev_ntargets(&this->base);
/*
* Automatic placement of the bad block table. Search direction
@ -745,7 +745,7 @@ static int write_bbt(struct nand_chip *this, uint8_t *buf,
numblocks = (int)(targetsize >> this->bbt_erase_shift);
/* Full device write or specific chip? */
if (chipsel == -1) {
nrchips = this->numchips;
nrchips = nanddev_ntargets(&this->base);
} else {
nrchips = chipsel + 1;
chip = chipsel;
@ -932,7 +932,7 @@ static int check_create(struct nand_chip *this, uint8_t *buf,
/* Do we have a bbt per chip? */
if (td->options & NAND_BBT_PERCHIP)
chips = this->numchips;
chips = nanddev_ntargets(&this->base);
else
chips = 1;
@ -1111,7 +1111,7 @@ static void mark_bbt_region(struct nand_chip *this, struct nand_bbt_descr *td)
/* Do we have a bbt per chip? */
if (td->options & NAND_BBT_PERCHIP) {
chips = this->numchips;
chips = nanddev_ntargets(&this->base);
nrblocks = (int)(targetsize >> this->bbt_erase_shift);
} else {
chips = 1;

7
include/linux/mtd/rawnand.h
View File

@ -1002,7 +1002,6 @@ struct nand_legacy {
* set to the actually used ONFI mode if the chip is
* ONFI compliant or deduced from the datasheet if
* the NAND chip is not ONFI compliant.
* @numchips: [INTERN] number of physical chips
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
* @data_buf: [INTERN] buffer for data, size is (page size + oobsize).
* @pagecache: Structure containing page cache related fields
@ -1016,8 +1015,9 @@ struct nand_legacy {
* @data_interface: [INTERN] NAND interface timing information
* @cur_cs: currently selected target. -1 means no target selected,
* otherwise we should always have cur_cs >= 0 &&
* cur_cs < numchips. NAND Controller drivers should not
* modify this value, but they're allowed to read it.
* cur_cs < nanddev_ntargets(). NAND Controller drivers
* should not modify this value, but they're allowed to
* read it.
* @read_retries: [INTERN] the number of read retry modes supported
* @lock: lock protecting the suspended field. Also used to
* serialize accesses to the NAND device.
@ -1051,7 +1051,6 @@ struct nand_chip {
int phys_erase_shift;
int bbt_erase_shift;
int chip_shift;
int numchips;
int pagemask;
u8 *data_buf;