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platform/x86: ISST: Add Intel Speed Select mailbox interface via PCI
Add an IOCTL to send mailbox commands to PUNIT using PUNIT PCI device. A limited set of mailbox commands can be sent to PUNIT. This MMIO interface is used by the intel-speed-select tool under tools/x86/power to enumerate and control Intel Speed Select features. The MBOX commands ids and semantics of the message can be checked from the source code of the tool. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Srinivas Pandruvada
Andy Shevchenko
parent
d3a2358429
commit
31a166fe9c
@ -6,3 +6,4 @@
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obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += isst_if_common.o
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obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += isst_if_mmio.o
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obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += isst_if_mbox_pci.o
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@ -25,6 +25,86 @@
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static struct isst_if_cmd_cb punit_callbacks[ISST_IF_DEV_MAX];
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struct isst_valid_cmd_ranges {
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u16 cmd;
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u16 sub_cmd_beg;
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u16 sub_cmd_end;
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};
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struct isst_cmd_set_req_type {
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u16 cmd;
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u16 sub_cmd;
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u16 param;
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};
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static const struct isst_valid_cmd_ranges isst_valid_cmds[] = {
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{0xD0, 0x00, 0x03},
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{0x7F, 0x00, 0x0B},
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{0x7F, 0x10, 0x12},
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{0x7F, 0x20, 0x23},
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};
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static const struct isst_cmd_set_req_type isst_cmd_set_reqs[] = {
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{0xD0, 0x00, 0x08},
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{0xD0, 0x01, 0x08},
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{0xD0, 0x02, 0x08},
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{0xD0, 0x03, 0x08},
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{0x7F, 0x02, 0x00},
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{0x7F, 0x08, 0x00},
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};
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/**
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* isst_if_mbox_cmd_invalid() - Check invalid mailbox commands
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* @cmd: Pointer to the command structure to verify.
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*
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* Invalid command to PUNIT to may result in instability of the platform.
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* This function has a whitelist of commands, which are allowed.
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*
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* Return: Return true if the command is invalid, else false.
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*/
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bool isst_if_mbox_cmd_invalid(struct isst_if_mbox_cmd *cmd)
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{
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int i;
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if (cmd->logical_cpu >= nr_cpu_ids)
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return true;
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for (i = 0; i < ARRAY_SIZE(isst_valid_cmds); ++i) {
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if (cmd->command == isst_valid_cmds[i].cmd &&
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(cmd->sub_command >= isst_valid_cmds[i].sub_cmd_beg &&
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cmd->sub_command <= isst_valid_cmds[i].sub_cmd_end)) {
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return false;
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}
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}
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return true;
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}
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EXPORT_SYMBOL_GPL(isst_if_mbox_cmd_invalid);
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/**
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* isst_if_mbox_cmd_set_req() - Check mailbox command is a set request
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* @cmd: Pointer to the command structure to verify.
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*
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* Check if the given mail box level is set request and not a get request.
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*
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* Return: Return true if the command is set_req, else false.
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*/
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bool isst_if_mbox_cmd_set_req(struct isst_if_mbox_cmd *cmd)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(isst_cmd_set_reqs); ++i) {
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if (cmd->command == isst_cmd_set_reqs[i].cmd &&
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cmd->sub_command == isst_cmd_set_reqs[i].sub_cmd &&
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cmd->parameter == isst_cmd_set_reqs[i].param) {
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return true;
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}
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}
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return false;
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}
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EXPORT_SYMBOL_GPL(isst_if_mbox_cmd_set_req);
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static int isst_if_get_platform_info(void __user *argp)
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{
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struct isst_if_platform_info info;
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@ -224,6 +304,11 @@ static long isst_if_def_ioctl(struct file *file, unsigned int cmd,
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if (cb->registered)
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ret = isst_if_exec_multi_cmd(argp, cb);
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break;
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case ISST_IF_MBOX_COMMAND:
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cb = &punit_callbacks[ISST_IF_DEV_MBOX];
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if (cb->registered)
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ret = isst_if_exec_multi_cmd(argp, cb);
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break;
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default:
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break;
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}
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@ -11,6 +11,7 @@
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#define __ISST_IF_COMMON_H
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#define INTEL_RAPL_PRIO_DEVID_0 0x3451
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#define INTEL_CFG_MBOX_DEVID_0 0x3459
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/*
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* Validate maximum commands in a single request.
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@ -60,4 +61,6 @@ struct isst_if_cmd_cb {
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int isst_if_cdev_register(int type, struct isst_if_cmd_cb *cb);
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void isst_if_cdev_unregister(int type);
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struct pci_dev *isst_if_get_pci_dev(int cpu, int bus, int dev, int fn);
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bool isst_if_mbox_cmd_set_req(struct isst_if_mbox_cmd *mbox_cmd);
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bool isst_if_mbox_cmd_invalid(struct isst_if_mbox_cmd *cmd);
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#endif
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199
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c
Normal file
199
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c
Normal file
@ -0,0 +1,199 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Speed Select Interface: Mbox via PCI Interface
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* Copyright (c) 2019, Intel Corporation.
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* All rights reserved.
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*
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* Author: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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*/
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#include <linux/cpufeature.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/sched/signal.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/isst_if.h>
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#include "isst_if_common.h"
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#define PUNIT_MAILBOX_DATA 0xA0
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#define PUNIT_MAILBOX_INTERFACE 0xA4
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#define PUNIT_MAILBOX_BUSY_BIT 31
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/*
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* Commands has variable amount of processing time. Most of the commands will
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* be done in 0-3 tries, but some takes up to 50.
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* The real processing time was observed as 25us for the most of the commands
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* at 2GHz. It is possible to optimize this count taking samples on customer
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* systems.
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*/
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#define OS_MAILBOX_RETRY_COUNT 50
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struct isst_if_device {
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struct mutex mutex;
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};
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static int isst_if_mbox_cmd(struct pci_dev *pdev,
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struct isst_if_mbox_cmd *mbox_cmd)
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{
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u32 retries, data;
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int ret;
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/* Poll for rb bit == 0 */
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retries = OS_MAILBOX_RETRY_COUNT;
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do {
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_INTERFACE,
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&data);
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if (ret)
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return ret;
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if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) {
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ret = -EBUSY;
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continue;
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}
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ret = 0;
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break;
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} while (--retries);
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if (ret)
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return ret;
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/* Write DATA register */
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ret = pci_write_config_dword(pdev, PUNIT_MAILBOX_DATA,
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mbox_cmd->req_data);
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if (ret)
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return ret;
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/* Write command register */
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data = BIT_ULL(PUNIT_MAILBOX_BUSY_BIT) |
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(mbox_cmd->parameter & GENMASK_ULL(13, 0)) << 16 |
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(mbox_cmd->sub_command << 8) |
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mbox_cmd->command;
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ret = pci_write_config_dword(pdev, PUNIT_MAILBOX_INTERFACE, data);
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if (ret)
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return ret;
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/* Poll for rb bit == 0 */
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retries = OS_MAILBOX_RETRY_COUNT;
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do {
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_INTERFACE,
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&data);
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if (ret)
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return ret;
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if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) {
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ret = -EBUSY;
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continue;
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}
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if (data & 0xff)
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return -ENXIO;
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_DATA, &data);
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if (ret)
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return ret;
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mbox_cmd->resp_data = data;
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ret = 0;
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break;
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} while (--retries);
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return ret;
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}
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static long isst_if_mbox_proc_cmd(u8 *cmd_ptr, int *write_only, int resume)
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{
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struct isst_if_mbox_cmd *mbox_cmd;
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struct isst_if_device *punit_dev;
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struct pci_dev *pdev;
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int ret;
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mbox_cmd = (struct isst_if_mbox_cmd *)cmd_ptr;
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if (isst_if_mbox_cmd_invalid(mbox_cmd))
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return -EINVAL;
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if (isst_if_mbox_cmd_set_req(mbox_cmd) && !capable(CAP_SYS_ADMIN))
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return -EPERM;
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pdev = isst_if_get_pci_dev(mbox_cmd->logical_cpu, 1, 30, 1);
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if (!pdev)
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return -EINVAL;
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punit_dev = pci_get_drvdata(pdev);
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if (!punit_dev)
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return -EINVAL;
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/*
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* Basically we are allowing one complete mailbox transaction on
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* a mapped PCI device at a time.
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*/
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mutex_lock(&punit_dev->mutex);
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ret = isst_if_mbox_cmd(pdev, mbox_cmd);
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mutex_unlock(&punit_dev->mutex);
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if (ret)
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return ret;
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*write_only = 0;
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return 0;
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}
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static const struct pci_device_id isst_if_mbox_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_0)},
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{ 0 },
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};
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MODULE_DEVICE_TABLE(pci, isst_if_mbox_ids);
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static int isst_if_mbox_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct isst_if_device *punit_dev;
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struct isst_if_cmd_cb cb;
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int ret;
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punit_dev = devm_kzalloc(&pdev->dev, sizeof(*punit_dev), GFP_KERNEL);
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if (!punit_dev)
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return -ENOMEM;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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mutex_init(&punit_dev->mutex);
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pci_set_drvdata(pdev, punit_dev);
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memset(&cb, 0, sizeof(cb));
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cb.cmd_size = sizeof(struct isst_if_mbox_cmd);
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cb.offset = offsetof(struct isst_if_mbox_cmds, mbox_cmd);
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cb.cmd_callback = isst_if_mbox_proc_cmd;
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cb.owner = THIS_MODULE;
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ret = isst_if_cdev_register(ISST_IF_DEV_MBOX, &cb);
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if (ret)
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mutex_destroy(&punit_dev->mutex);
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return ret;
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}
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static void isst_if_mbox_remove(struct pci_dev *pdev)
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{
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struct isst_if_device *punit_dev;
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punit_dev = pci_get_drvdata(pdev);
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isst_if_cdev_unregister(ISST_IF_DEV_MBOX);
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mutex_destroy(&punit_dev->mutex);
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}
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static struct pci_driver isst_if_pci_driver = {
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.name = "isst_if_mbox_pci",
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.id_table = isst_if_mbox_ids,
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.probe = isst_if_mbox_probe,
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.remove = isst_if_mbox_remove,
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};
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module_pci_driver(isst_if_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel speed select interface pci mailbox driver");
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@ -95,8 +95,46 @@ struct isst_if_io_regs {
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struct isst_if_io_reg io_reg[1];
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};
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/**
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* struct isst_if_mbox_cmd - Structure to define mail box command
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* @logical_cpu: Logical CPU number to get target PCI device
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* @parameter: Mailbox parameter value
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* @req_data: Request data for the mailbox
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* @resp_data: Response data for mailbox command response
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* @command: Mailbox command value
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* @sub_command: Mailbox sub command value
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* @reserved: Unused, set to 0
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*
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* Structure to specify mailbox command to be sent to PUNIT.
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*/
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struct isst_if_mbox_cmd {
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__u32 logical_cpu;
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__u32 parameter;
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__u32 req_data;
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__u32 resp_data;
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__u16 command;
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__u16 sub_command;
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__u32 reserved;
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};
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/**
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* struct isst_if_mbox_cmds - structure for mailbox commands
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* @cmd_count: Number of mailbox commands in mbox_cmd[]
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* @mbox_cmd[]: Holds one or more mbox commands
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*
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* This structure used with ioctl ISST_IF_MBOX_COMMAND to send
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* one or more mailbox commands to PUNIT. Here IOCTL return value
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* indicates number of commands sent or error number if no commands have
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* been sent.
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*/
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struct isst_if_mbox_cmds {
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__u32 cmd_count;
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struct isst_if_mbox_cmd mbox_cmd[1];
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};
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#define ISST_IF_MAGIC 0xFE
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#define ISST_IF_GET_PLATFORM_INFO _IOR(ISST_IF_MAGIC, 0, struct isst_if_platform_info *)
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#define ISST_IF_GET_PHY_ID _IOWR(ISST_IF_MAGIC, 1, struct isst_if_cpu_map *)
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#define ISST_IF_IO_CMD _IOW(ISST_IF_MAGIC, 2, struct isst_if_io_regs *)
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#define ISST_IF_MBOX_COMMAND _IOWR(ISST_IF_MAGIC, 3, struct isst_if_mbox_cmds *)
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#endif
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