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intel-iommu: fix PCI device detach from virtual machine
When assign a device behind conventional PCI bridge or PCIe to PCI/PCI-x bridge to a domain, it must assign its bridge and may also need to assign secondary interface to the same domain. Dependent assignment is already there, but dependent deassignment is missed when detach device from virtual machine. This results in conventional PCI device assignment failure after it has been assigned once. This patch addes dependent deassignment, and fixes the issue. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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9cf0669746
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@ -2808,6 +2808,33 @@ static int vm_domain_add_dev_info(struct dmar_domain *domain,
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return 0;
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}
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static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
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struct pci_dev *pdev)
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{
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struct pci_dev *tmp, *parent;
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if (!iommu || !pdev)
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return;
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/* dependent device detach */
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tmp = pci_find_upstream_pcie_bridge(pdev);
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/* Secondary interface's bus number and devfn 0 */
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if (tmp) {
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parent = pdev->bus->self;
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while (parent != tmp) {
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iommu_detach_dev(iommu, parent->bus->number,
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parent->devfn);
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parent = parent->bus->self;
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}
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if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
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iommu_detach_dev(iommu,
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tmp->subordinate->number, 0);
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else /* this is a legacy PCI bridge */
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iommu_detach_dev(iommu,
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tmp->bus->number, tmp->devfn);
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}
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}
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static void vm_domain_remove_one_dev_info(struct dmar_domain *domain,
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struct pci_dev *pdev)
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{
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@ -2833,6 +2860,7 @@ static void vm_domain_remove_one_dev_info(struct dmar_domain *domain,
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spin_unlock_irqrestore(&device_domain_lock, flags);
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iommu_detach_dev(iommu, info->bus, info->devfn);
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iommu_detach_dependent_devices(iommu, pdev);
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free_devinfo_mem(info);
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spin_lock_irqsave(&device_domain_lock, flags);
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@ -2882,6 +2910,7 @@ static void vm_domain_remove_all_dev_info(struct dmar_domain *domain)
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iommu = device_to_iommu(info->bus, info->devfn);
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iommu_detach_dev(iommu, info->bus, info->devfn);
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iommu_detach_dependent_devices(iommu, info->dev);
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/* clear this iommu in iommu_bmp, update iommu count
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* and capabilities
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