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media: i2c: ov5640: Configure HVP lines in s_power callback
Configure HVP lines in s_power callback instead of configuring everytime in ov5640_set_stream_dvp(). Alongside also disable MIPI in DVP mode. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Tested-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Lad Prabhakar
Mauro Carvalho Chehab
parent
576f5d4ba8
commit
311a6408f8
@ -1217,71 +1217,6 @@ static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
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{
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{
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int ret;
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unsigned int flags = sensor->ep.bus.parallel.flags;
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u8 pclk_pol = 0;
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u8 hsync_pol = 0;
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u8 vsync_pol = 0;
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/*
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* Note about parallel port configuration.
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*
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* When configured in parallel mode, the OV5640 will
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* output 10 bits data on DVP data lines [9:0].
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* If only 8 bits data are wanted, the 8 bits data lines
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* of the camera interface must be physically connected
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* on the DVP data lines [9:2].
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*
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* Control lines polarity can be configured through
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* devicetree endpoint control lines properties.
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* If no endpoint control lines properties are set,
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* polarity will be as below:
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* - VSYNC: active high
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* - HREF: active low
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* - PCLK: active low
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*/
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if (on) {
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/*
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* configure parallel port control lines polarity
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*
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* POLARITY CTRL0
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* - [5]: PCLK polarity (0: active low, 1: active high)
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* - [1]: HREF polarity (0: active low, 1: active high)
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* - [0]: VSYNC polarity (mismatch here between
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* datasheet and hardware, 0 is active high
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* and 1 is active low...)
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*/
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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pclk_pol = 1;
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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hsync_pol = 1;
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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vsync_pol = 1;
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ret = ov5640_write_reg(sensor,
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OV5640_REG_POLARITY_CTRL00,
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(pclk_pol << 5) |
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(hsync_pol << 1) |
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vsync_pol);
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if (ret)
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return ret;
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}
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/*
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* powerdown MIPI TX/RX PHY & disable MIPI
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*
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* MIPI CONTROL 00
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* 4: PWDN PHY TX
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* 3: PWDN PHY RX
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* 2: MIPI enable
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*/
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ret = ov5640_write_reg(sensor,
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OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
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if (ret)
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return ret;
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return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
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return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
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OV5640_REG_SYS_CTRL0_SW_PWUP :
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OV5640_REG_SYS_CTRL0_SW_PWUP :
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OV5640_REG_SYS_CTRL0_SW_PWDN);
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OV5640_REG_SYS_CTRL0_SW_PWDN);
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@ -2043,15 +1978,73 @@ static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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{
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{
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unsigned int flags = sensor->ep.bus.parallel.flags;
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u8 pclk_pol = 0;
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u8 hsync_pol = 0;
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u8 vsync_pol = 0;
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int ret;
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int ret;
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if (!on) {
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if (!on) {
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/* Reset settings to their default values. */
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/* Reset settings to their default values. */
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ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
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ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
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return 0;
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return 0;
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}
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}
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/*
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* Note about parallel port configuration.
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*
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* When configured in parallel mode, the OV5640 will
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* output 10 bits data on DVP data lines [9:0].
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* If only 8 bits data are wanted, the 8 bits data lines
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* of the camera interface must be physically connected
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* on the DVP data lines [9:2].
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*
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* Control lines polarity can be configured through
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* devicetree endpoint control lines properties.
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* If no endpoint control lines properties are set,
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* polarity will be as below:
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* - VSYNC: active high
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* - HREF: active low
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* - PCLK: active low
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*/
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/*
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* configure parallel port control lines polarity
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*
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* POLARITY CTRL0
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* - [5]: PCLK polarity (0: active low, 1: active high)
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* - [1]: HREF polarity (0: active low, 1: active high)
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* - [0]: VSYNC polarity (mismatch here between
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* datasheet and hardware, 0 is active high
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* and 1 is active low...)
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*/
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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pclk_pol = 1;
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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hsync_pol = 1;
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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vsync_pol = 1;
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ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00,
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(pclk_pol << 5) | (hsync_pol << 1) | vsync_pol);
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if (ret)
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return ret;
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/*
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* powerdown MIPI TX/RX PHY & disable MIPI
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*
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* MIPI CONTROL 00
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* 4: PWDN PHY TX
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* 3: PWDN PHY RX
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* 2: MIPI enable
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*/
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ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
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if (ret)
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return ret;
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/*
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/*
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* enable VSYNC/HREF/PCLK DVP control lines
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* enable VSYNC/HREF/PCLK DVP control lines
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* & D[9:6] DVP data lines
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* & D[9:6] DVP data lines
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