korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-05 01:54:09 +08:00
Code Issues Packages Projects Releases Wiki Activity

media: i2c: ov5640: Configure HVP lines in s_power callback

Browse Source 
Configure HVP lines in s_power callback instead of configuring everytime
in ov5640_set_stream_dvp().

Alongside also disable MIPI in DVP mode.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Lad Prabhakar 2020-09-04 22:18:33 +02:00 committed by Mauro Carvalho Chehab
parent 576f5d4ba8
commit 311a6408f8
1 changed files with 58 additions and 65 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

123
drivers/media/i2c/ov5640.c
View File

@ -1217,71 +1217,6 @@ static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
{
int ret;
unsigned int flags = sensor->ep.bus.parallel.flags;
u8 pclk_pol = 0;
u8 hsync_pol = 0;
u8 vsync_pol = 0;
/*
* Note about parallel port configuration.
*
* When configured in parallel mode, the OV5640 will
* output 10 bits data on DVP data lines [9:0].
* If only 8 bits data are wanted, the 8 bits data lines
* of the camera interface must be physically connected
* on the DVP data lines [9:2].
*
* Control lines polarity can be configured through
* devicetree endpoint control lines properties.
* If no endpoint control lines properties are set,
* polarity will be as below:
* - VSYNC: active high
* - HREF: active low
* - PCLK: active low
*/
if (on) {
/*
* configure parallel port control lines polarity
*
* POLARITY CTRL0
* - [5]: PCLK polarity (0: active low, 1: active high)
* - [1]: HREF polarity (0: active low, 1: active high)
* - [0]: VSYNC polarity (mismatch here between
* datasheet and hardware, 0 is active high
* and 1 is active low...)
*/
if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
pclk_pol = 1;
if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
hsync_pol = 1;
if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
vsync_pol = 1;
ret = ov5640_write_reg(sensor,
OV5640_REG_POLARITY_CTRL00,
(pclk_pol << 5) |
(hsync_pol << 1) |
vsync_pol);
if (ret)
return ret;
}
/*
* powerdown MIPI TX/RX PHY & disable MIPI
*
* MIPI CONTROL 00
* 4: PWDN PHY TX
* 3: PWDN PHY RX
* 2: MIPI enable
*/
ret = ov5640_write_reg(sensor,
OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
if (ret)
return ret;
return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
OV5640_REG_SYS_CTRL0_SW_PWUP :
OV5640_REG_SYS_CTRL0_SW_PWDN);
@ -2043,15 +1978,73 @@ static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
{
unsigned int flags = sensor->ep.bus.parallel.flags;
u8 pclk_pol = 0;
u8 hsync_pol = 0;
u8 vsync_pol = 0;
int ret;
if (!on) {
/* Reset settings to their default values. */
ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
return 0;
}
/*
* Note about parallel port configuration.
*
* When configured in parallel mode, the OV5640 will
* output 10 bits data on DVP data lines [9:0].
* If only 8 bits data are wanted, the 8 bits data lines
* of the camera interface must be physically connected
* on the DVP data lines [9:2].
*
* Control lines polarity can be configured through
* devicetree endpoint control lines properties.
* If no endpoint control lines properties are set,
* polarity will be as below:
* - VSYNC: active high
* - HREF: active low
* - PCLK: active low
*/
/*
* configure parallel port control lines polarity
*
* POLARITY CTRL0
* - [5]: PCLK polarity (0: active low, 1: active high)
* - [1]: HREF polarity (0: active low, 1: active high)
* - [0]: VSYNC polarity (mismatch here between
* datasheet and hardware, 0 is active high
* and 1 is active low...)
*/
if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
pclk_pol = 1;
if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
hsync_pol = 1;
if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
vsync_pol = 1;
ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00,
(pclk_pol << 5) | (hsync_pol << 1) | vsync_pol);
if (ret)
return ret;
/*
* powerdown MIPI TX/RX PHY & disable MIPI
*
* MIPI CONTROL 00
* 4: PWDN PHY TX
* 3: PWDN PHY RX
* 2: MIPI enable
*/
ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
if (ret)
return ret;
/*
* enable VSYNC/HREF/PCLK DVP control lines
* & D[9:6] DVP data lines