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drm/amdgpu: Optimize amdgpu_gfx_ras_late_init/amdgpu_gfx_ras_fini function code
Optimize amdgpu_gfx_ras_late_init/amdgpu_gfx_ras_fini function code. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -625,26 +625,9 @@ int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value)
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int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, void *ras_info)
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{
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int r;
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struct ras_fs_if fs_info = {
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.sysfs_name = "gfx_err_count",
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};
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struct ras_ih_if ih_info = {
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.cb = amdgpu_gfx_process_ras_data_cb,
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};
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if (!adev->gfx.ras_if) {
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adev->gfx.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
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if (!adev->gfx.ras_if)
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return -ENOMEM;
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adev->gfx.ras_if->block = AMDGPU_RAS_BLOCK__GFX;
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adev->gfx.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
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adev->gfx.ras_if->sub_block_index = 0;
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}
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fs_info.head = ih_info.head = *adev->gfx.ras_if;
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r = amdgpu_ras_late_init(adev, adev->gfx.ras_if,
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&fs_info, &ih_info);
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r = amdgpu_ras_block_late_init(adev, adev->gfx.ras_if);
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if (r)
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goto free;
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return r;
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if (amdgpu_ras_is_supported(adev, adev->gfx.ras_if->block)) {
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if (!amdgpu_persistent_edc_harvesting_supported(adev))
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@ -653,34 +636,19 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, void *ras_info)
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r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0);
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if (r)
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goto late_fini;
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} else {
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/* free gfx ras_if if ras is not supported */
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r = 0;
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goto free;
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}
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return 0;
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late_fini:
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amdgpu_ras_late_fini(adev, adev->gfx.ras_if, &ih_info);
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free:
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kfree(adev->gfx.ras_if);
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adev->gfx.ras_if = NULL;
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amdgpu_ras_block_late_fini(adev, adev->gfx.ras_if);
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return r;
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}
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void amdgpu_gfx_ras_fini(struct amdgpu_device *adev)
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{
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if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
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adev->gfx.ras_if) {
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struct ras_common_if *ras_if = adev->gfx.ras_if;
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struct ras_ih_if ih_info = {
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.head = *ras_if,
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.cb = amdgpu_gfx_process_ras_data_cb,
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};
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amdgpu_ras_late_fini(adev, ras_if, &ih_info);
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kfree(ras_if);
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}
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adev->gfx.ras_if)
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amdgpu_ras_block_late_fini(adev, adev->gfx.ras_if);
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}
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int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
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@ -2197,6 +2197,8 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
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strcpy(adev->gfx.ras->ras_block.ras_comm.name, "gfx");
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adev->gfx.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX;
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adev->gfx.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
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adev->gfx.ras_if = &adev->gfx.ras->ras_block.ras_comm;
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/* If not define special ras_late_init function, use gfx default ras_late_init */
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if (!adev->gfx.ras->ras_block.ras_late_init)
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@ -2205,6 +2207,10 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
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/* If not define special ras_fini function, use gfx default ras_fini */
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if (!adev->gfx.ras->ras_block.ras_fini)
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adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
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/* If not defined special ras_cb function, use default ras_cb */
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if (!adev->gfx.ras->ras_block.ras_cb)
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adev->gfx.ras->ras_block.ras_cb = amdgpu_gfx_process_ras_data_cb;
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}
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adev->gfx.config.gb_addr_config = gb_addr_config;
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