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i40e: Use batched xsk Tx interfaces to increase performance
Use the new batched xsk interfaces for the Tx path in the i40e driver to improve performance. On my machine, this yields a throughput increase of 4% for the l2fwd sample app in xdpsock. If we instead just look at the Tx part, this patch set increases throughput with above 20% for Tx. Note that I had to explicitly loop unroll the inner loop to get to this performance level, by using a pragma. It is honored by both clang and gcc and should be ignored by versions that do not support it. Using the -funroll-loops compiler command line switch on the source file resulted in a loop unrolling on a higher level that lead to a performance decrease instead of an increase. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: John Fastabend <john.fastabend@gmail.com> Link: https://lore.kernel.org/bpf/1605525167-14450-6-git-send-email-magnus.karlsson@gmail.com
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@ -676,6 +676,8 @@ void i40e_free_tx_resources(struct i40e_ring *tx_ring)
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i40e_clean_tx_ring(tx_ring);
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kfree(tx_ring->tx_bi);
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tx_ring->tx_bi = NULL;
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kfree(tx_ring->xsk_descs);
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tx_ring->xsk_descs = NULL;
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if (tx_ring->desc) {
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dma_free_coherent(tx_ring->dev, tx_ring->size,
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@ -1277,6 +1279,13 @@ int i40e_setup_tx_descriptors(struct i40e_ring *tx_ring)
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if (!tx_ring->tx_bi)
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goto err;
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if (ring_is_xdp(tx_ring)) {
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tx_ring->xsk_descs = kcalloc(I40E_MAX_NUM_DESCRIPTORS, sizeof(*tx_ring->xsk_descs),
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GFP_KERNEL);
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if (!tx_ring->xsk_descs)
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goto err;
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}
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u64_stats_init(&tx_ring->syncp);
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/* round up to nearest 4K */
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@ -1300,6 +1309,8 @@ int i40e_setup_tx_descriptors(struct i40e_ring *tx_ring)
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return 0;
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err:
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kfree(tx_ring->xsk_descs);
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tx_ring->xsk_descs = NULL;
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kfree(tx_ring->tx_bi);
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tx_ring->tx_bi = NULL;
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return -ENOMEM;
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@ -389,6 +389,7 @@ struct i40e_ring {
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struct i40e_channel *ch;
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struct xdp_rxq_info xdp_rxq;
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struct xsk_buff_pool *xsk_pool;
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struct xdp_desc *xsk_descs; /* For storing descriptors in the AF_XDP ZC path */
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} ____cacheline_internodealigned_in_smp;
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static inline bool ring_uses_build_skb(struct i40e_ring *ring)
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@ -2,6 +2,7 @@
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/* Copyright(c) 2018 Intel Corporation. */
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#include <linux/bpf_trace.h>
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#include <linux/stringify.h>
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#include <net/xdp_sock_drv.h>
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#include <net/xdp.h>
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@ -381,6 +382,69 @@ int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget)
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return failure ? budget : (int)total_rx_packets;
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}
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static void i40e_xmit_pkt(struct i40e_ring *xdp_ring, struct xdp_desc *desc,
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unsigned int *total_bytes)
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{
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struct i40e_tx_desc *tx_desc;
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dma_addr_t dma;
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dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc->addr);
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xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, desc->len);
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tx_desc = I40E_TX_DESC(xdp_ring, xdp_ring->next_to_use++);
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tx_desc->buffer_addr = cpu_to_le64(dma);
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tx_desc->cmd_type_offset_bsz = build_ctob(I40E_TX_DESC_CMD_ICRC | I40E_TX_DESC_CMD_EOP,
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0, desc->len, 0);
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*total_bytes += desc->len;
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}
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static void i40e_xmit_pkt_batch(struct i40e_ring *xdp_ring, struct xdp_desc *desc,
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unsigned int *total_bytes)
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{
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u16 ntu = xdp_ring->next_to_use;
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struct i40e_tx_desc *tx_desc;
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dma_addr_t dma;
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u32 i;
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loop_unrolled_for(i = 0; i < PKTS_PER_BATCH; i++) {
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dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc[i].addr);
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xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, desc[i].len);
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tx_desc = I40E_TX_DESC(xdp_ring, ntu++);
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tx_desc->buffer_addr = cpu_to_le64(dma);
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tx_desc->cmd_type_offset_bsz = build_ctob(I40E_TX_DESC_CMD_ICRC |
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I40E_TX_DESC_CMD_EOP,
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0, desc[i].len, 0);
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*total_bytes += desc[i].len;
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}
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xdp_ring->next_to_use = ntu;
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}
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static void i40e_fill_tx_hw_ring(struct i40e_ring *xdp_ring, struct xdp_desc *descs, u32 nb_pkts,
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unsigned int *total_bytes)
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{
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u32 batched, leftover, i;
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batched = nb_pkts & ~(PKTS_PER_BATCH - 1);
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leftover = nb_pkts & (PKTS_PER_BATCH - 1);
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for (i = 0; i < batched; i += PKTS_PER_BATCH)
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i40e_xmit_pkt_batch(xdp_ring, &descs[i], total_bytes);
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for (i = batched; i < batched + leftover; i++)
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i40e_xmit_pkt(xdp_ring, &descs[i], total_bytes);
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}
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static void i40e_set_rs_bit(struct i40e_ring *xdp_ring)
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{
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u16 ntu = xdp_ring->next_to_use ? xdp_ring->next_to_use - 1 : xdp_ring->count - 1;
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struct i40e_tx_desc *tx_desc;
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tx_desc = I40E_TX_DESC(xdp_ring, ntu);
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tx_desc->cmd_type_offset_bsz |= (I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT);
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}
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/**
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* i40e_xmit_zc - Performs zero-copy Tx AF_XDP
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* @xdp_ring: XDP Tx ring
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@ -390,45 +454,30 @@ int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget)
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**/
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static bool i40e_xmit_zc(struct i40e_ring *xdp_ring, unsigned int budget)
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{
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unsigned int sent_frames = 0, total_bytes = 0;
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struct i40e_tx_desc *tx_desc = NULL;
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struct xdp_desc desc;
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dma_addr_t dma;
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struct xdp_desc *descs = xdp_ring->xsk_descs;
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u32 nb_pkts, nb_processed = 0;
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unsigned int total_bytes = 0;
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while (budget-- > 0) {
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if (!xsk_tx_peek_desc(xdp_ring->xsk_pool, &desc))
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break;
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nb_pkts = xsk_tx_peek_release_desc_batch(xdp_ring->xsk_pool, descs, budget);
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if (!nb_pkts)
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return false;
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dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc.addr);
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xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma,
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desc.len);
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tx_desc = I40E_TX_DESC(xdp_ring, xdp_ring->next_to_use);
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tx_desc->buffer_addr = cpu_to_le64(dma);
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tx_desc->cmd_type_offset_bsz =
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build_ctob(I40E_TX_DESC_CMD_ICRC
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| I40E_TX_DESC_CMD_EOP,
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0, desc.len, 0);
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sent_frames++;
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total_bytes += desc.len;
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xdp_ring->next_to_use++;
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if (xdp_ring->next_to_use == xdp_ring->count)
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xdp_ring->next_to_use = 0;
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if (xdp_ring->next_to_use + nb_pkts >= xdp_ring->count) {
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nb_processed = xdp_ring->count - xdp_ring->next_to_use;
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i40e_fill_tx_hw_ring(xdp_ring, descs, nb_processed, &total_bytes);
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xdp_ring->next_to_use = 0;
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}
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if (tx_desc) {
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/* Request an interrupt for the last frame and bump tail ptr. */
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tx_desc->cmd_type_offset_bsz |= (I40E_TX_DESC_CMD_RS <<
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I40E_TXD_QW1_CMD_SHIFT);
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i40e_xdp_ring_update_tail(xdp_ring);
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i40e_fill_tx_hw_ring(xdp_ring, &descs[nb_processed], nb_pkts - nb_processed,
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&total_bytes);
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xsk_tx_release(xdp_ring->xsk_pool);
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i40e_update_tx_stats(xdp_ring, sent_frames, total_bytes);
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}
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/* Request an interrupt for the last frame and bump tail ptr. */
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i40e_set_rs_bit(xdp_ring);
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i40e_xdp_ring_update_tail(xdp_ring);
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return !!budget;
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i40e_update_tx_stats(xdp_ring, nb_pkts, total_bytes);
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return true;
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}
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/**
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@ -4,6 +4,22 @@
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#ifndef _I40E_XSK_H_
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#define _I40E_XSK_H_
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/* This value should match the pragma in the loop_unrolled_for
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* macro. Why 4? It is strictly empirical. It seems to be a good
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* compromise between the advantage of having simultaneous outstanding
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* reads to the DMA array that can hide each others latency and the
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* disadvantage of having a larger code path.
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*/
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#define PKTS_PER_BATCH 4
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#ifdef __clang__
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#define loop_unrolled_for _Pragma("clang loop unroll_count(4)") for
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#elif __GNUC__ >= 8
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#define loop_unrolled_for _Pragma("GCC unroll 4") for
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#else
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#define loop_unrolled_for for
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#endif
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struct i40e_vsi;
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struct xsk_buff_pool;
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struct zero_copy_allocator;
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