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Merge branch 'mlx5e-rc2-misc-patches'
Tariq Toukan says: ==================== mlx5e rc2 misc patches (part) This patchset includes small features and a cleanup for the mlx5e driver. Patches 1-2 by Cosmin implements FEC settings for 100G/lane modes. Patch 3 is a simple cleanup. ==================== Link: https://lore.kernel.org/r/20240404173357.123307-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
30a22b8cd9
@ -1143,7 +1143,6 @@ void mlx5e_close_drop_rq(struct mlx5e_rq *drop_rq);
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int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn);
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void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn);
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int mlx5e_update_nic_rx(struct mlx5e_priv *priv);
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void mlx5e_update_carrier(struct mlx5e_priv *priv);
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int mlx5e_close(struct net_device *netdev);
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int mlx5e_open(struct net_device *netdev);
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@ -1180,23 +1179,12 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
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struct ethtool_coalesce *coal,
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struct kernel_ethtool_coalesce *kernel_coal,
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struct netlink_ext_ack *extack);
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int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
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struct ethtool_link_ksettings *link_ksettings);
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int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
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const struct ethtool_link_ksettings *link_ksettings);
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int mlx5e_get_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh);
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int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,
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struct netlink_ext_ack *extack);
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u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv);
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u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv);
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int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
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struct ethtool_ts_info *info);
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int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
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struct ethtool_flash *flash);
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void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam);
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int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam);
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/* mlx5e generic netdev management API */
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static inline bool
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@ -292,10 +292,15 @@ enum mlx5e_fec_supported_link_mode {
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MLX5E_FEC_SUPPORTED_LINK_MODE_100G_2X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_200G_4X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X,
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MLX5E_MAX_FEC_SUPPORTED_LINK_MODE,
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};
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#define MLX5E_FEC_FIRST_50G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_50G_1X
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#define MLX5E_FEC_FIRST_100G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X
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#define MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, policy, write, link) \
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do { \
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@ -308,6 +313,17 @@ enum mlx5e_fec_supported_link_mode {
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*_policy = MLX5_GET(pplm_reg, _buf, fec_override_admin_##link); \
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} while (0)
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/* Returns true if FEC can be set for a given link mode. */
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static bool mlx5e_is_fec_supported_link_mode(struct mlx5_core_dev *dev,
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enum mlx5e_fec_supported_link_mode link_mode)
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{
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return link_mode < MLX5E_FEC_FIRST_50G_PER_LANE_MODE ||
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(link_mode < MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&
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MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm)) ||
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(link_mode >= MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&
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MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm));
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}
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/* get/set FEC admin field for a given speed */
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static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write,
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enum mlx5e_fec_supported_link_mode link_mode)
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@ -340,6 +356,18 @@ static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write,
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case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_8x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 100g_1x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 200g_2x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_4x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_8x);
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break;
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default:
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return -EINVAL;
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}
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@ -381,6 +409,18 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap,
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case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_8x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 100g_1x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 200g_2x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_4x);
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break;
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case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_8x);
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break;
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default:
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return -EINVAL;
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}
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@ -389,7 +429,6 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap,
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bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy)
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{
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bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);
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u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};
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u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
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int sz = MLX5_ST_SZ_BYTES(pplm_reg);
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@ -407,7 +446,7 @@ bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy)
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for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {
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u16 fec_caps;
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if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)
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if (!mlx5e_is_fec_supported_link_mode(dev, i))
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break;
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mlx5e_get_fec_cap_field(out, &fec_caps, i);
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@ -420,7 +459,6 @@ bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy)
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int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,
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u16 *fec_configured_mode)
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{
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bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);
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u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};
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u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
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int sz = MLX5_ST_SZ_BYTES(pplm_reg);
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@ -445,7 +483,7 @@ int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,
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*fec_configured_mode = 0;
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for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {
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if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)
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if (!mlx5e_is_fec_supported_link_mode(dev, i))
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break;
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mlx5e_fec_admin_field(out, fec_configured_mode, 0, i);
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@ -489,13 +527,13 @@ int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy)
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u16 conf_fec = fec_policy;
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u16 fec_caps = 0;
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if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)
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if (!mlx5e_is_fec_supported_link_mode(dev, i))
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break;
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/* RS fec in ethtool is mapped to MLX5E_FEC_RS_528_514
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* to link modes up to 25G per lane and to
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* MLX5E_FEC_RS_544_514 in the new link modes based on
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* 50 G per lane
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* 50G or 100G per lane
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*/
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if (conf_fec == (1 << MLX5E_FEC_RS_528_514) &&
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i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)
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@ -996,8 +996,8 @@ static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
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ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
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}
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int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
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struct ethtool_link_ksettings *link_ksettings)
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static int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
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struct ethtool_link_ksettings *link_ksettings)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
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@ -1167,8 +1167,8 @@ static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_suppo
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return autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
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}
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int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
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const struct ethtool_link_ksettings *link_ksettings)
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static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
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const struct ethtool_link_ksettings *link_ksettings)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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struct mlx5_port_eth_proto eproto;
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@ -1268,7 +1268,7 @@ static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
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return mlx5e_ethtool_get_rxfh_indir_size(priv);
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}
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int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)
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static int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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u32 rss_context = rxfh->rss_context;
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@ -1281,8 +1281,8 @@ int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)
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return err;
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}
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int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,
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struct netlink_ext_ack *extack)
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static int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,
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struct netlink_ext_ack *extack)
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{
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struct mlx5e_priv *priv = netdev_priv(dev);
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u32 *rss_context = &rxfh->rss_context;
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@ -1411,8 +1411,8 @@ static void mlx5e_get_pause_stats(struct net_device *netdev,
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mlx5e_stats_pause_get(priv, pause_stats);
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}
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void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam)
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static void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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int err;
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@ -1433,8 +1433,8 @@ static void mlx5e_get_pauseparam(struct net_device *netdev,
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mlx5e_ethtool_get_pauseparam(priv, pauseparam);
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}
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int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam)
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static int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
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struct ethtool_pauseparam *pauseparam)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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int err;
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@ -5562,7 +5562,7 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv)
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mlx5e_ipsec_cleanup(priv);
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}
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int mlx5e_update_nic_rx(struct mlx5e_priv *priv)
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static int mlx5e_update_nic_rx(struct mlx5e_priv *priv)
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{
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return mlx5e_refresh_tirs(priv, false, false);
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}
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@ -9817,7 +9817,21 @@ struct mlx5_ifc_pplm_reg_bits {
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u8 fec_override_admin_100g_2x[0x10];
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u8 fec_override_admin_50g_1x[0x10];
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u8 reserved_at_140[0x140];
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u8 fec_override_cap_800g_8x[0x10];
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u8 fec_override_cap_400g_4x[0x10];
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u8 fec_override_cap_200g_2x[0x10];
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u8 fec_override_cap_100g_1x[0x10];
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u8 reserved_at_180[0xa0];
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u8 fec_override_admin_800g_8x[0x10];
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u8 fec_override_admin_400g_4x[0x10];
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u8 fec_override_admin_200g_2x[0x10];
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u8 fec_override_admin_100g_1x[0x10];
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u8 reserved_at_260[0x20];
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};
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struct mlx5_ifc_ppcnt_reg_bits {
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@ -10189,7 +10203,9 @@ struct mlx5_ifc_mtutc_reg_bits {
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};
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struct mlx5_ifc_pcam_enhanced_features_bits {
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u8 reserved_at_0[0x68];
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u8 reserved_at_0[0x48];
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u8 fec_100G_per_lane_in_pplm[0x1];
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u8 reserved_at_49[0x1f];
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u8 fec_50G_per_lane_in_pplm[0x1];
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u8 reserved_at_69[0x4];
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u8 rx_icrc_encapsulated_counter[0x1];
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