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S2io: Fixes to enable multiple transmit fifo support
Fixes to enable multiple transmit fifos (upto a maximum of eight).
- Moved single tx_lock from struct s2io_nic to struct fifo_info.
- Moved single ufo_in_band_v structure from struct s2io_nic to struct
fifo_info.
- Assign the respective interrupt number for the transmitting fifo in the
transmit descriptor (TXD).
- Added boundary checks for number of FIFOs enabled and FIFO length.
Signed-off-by: Surjit Reang <surjit.reang@neterion.com>
Signed-off-by: Sreenivasa Honnur <sreenivasa.honnur@neterion.com>
Signed-off-by: Ramkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Surjit Reang
David S. Miller
parent
bc4b6b5269
commit
2fda096d18
@ -84,7 +84,7 @@
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#include "s2io.h"
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#include "s2io-regs.h"
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#define DRV_VERSION "2.0.26.17"
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#define DRV_VERSION "2.0.26.15-1"
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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@ -368,12 +368,19 @@ static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
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static void s2io_vlan_rx_register(struct net_device *dev,
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struct vlan_group *grp)
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{
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int i;
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struct s2io_nic *nic = dev->priv;
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unsigned long flags;
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unsigned long flags[MAX_TX_FIFOS];
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struct mac_info *mac_control = &nic->mac_control;
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struct config_param *config = &nic->config;
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for (i = 0; i < config->tx_fifo_num; i++)
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spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags[i]);
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spin_lock_irqsave(&nic->tx_lock, flags);
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nic->vlgrp = grp;
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spin_unlock_irqrestore(&nic->tx_lock, flags);
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for (i = config->tx_fifo_num - 1; i >= 0; i--)
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spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock,
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flags[i]);
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}
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/* A flag indicating whether 'RX_PA_CFG_STRIP_VLAN_TAG' bit is set or not */
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@ -565,6 +572,21 @@ static int init_shared_mem(struct s2io_nic *nic)
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return -EINVAL;
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}
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size = 0;
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for (i = 0; i < config->tx_fifo_num; i++) {
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size = config->tx_cfg[i].fifo_len;
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/*
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* Legal values are from 2 to 8192
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*/
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if (size < 2) {
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DBG_PRINT(ERR_DBG, "s2io: Invalid fifo len (%d)", size);
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DBG_PRINT(ERR_DBG, "for fifo %d\n", i);
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DBG_PRINT(ERR_DBG, "s2io: Legal values for fifo len"
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"are 2 to 8192\n");
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return -EINVAL;
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}
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}
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lst_size = (sizeof(struct TxD) * config->max_txds);
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lst_per_page = PAGE_SIZE / lst_size;
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@ -639,10 +661,14 @@ static int init_shared_mem(struct s2io_nic *nic)
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}
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}
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nic->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
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if (!nic->ufo_in_band_v)
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return -ENOMEM;
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mem_allocated += (size * sizeof(u64));
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for (i = 0; i < config->tx_fifo_num; i++) {
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size = config->tx_cfg[i].fifo_len;
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mac_control->fifos[i].ufo_in_band_v
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= kcalloc(size, sizeof(u64), GFP_KERNEL);
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if (!mac_control->fifos[i].ufo_in_band_v)
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return -ENOMEM;
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mem_allocated += (size * sizeof(u64));
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}
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/* Allocation and initialization of RXDs in Rings */
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size = 0;
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@ -829,7 +855,6 @@ static int init_shared_mem(struct s2io_nic *nic)
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static void free_shared_mem(struct s2io_nic *nic)
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{
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int i, j, blk_cnt, size;
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u32 ufo_size = 0;
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void *tmp_v_addr;
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dma_addr_t tmp_p_addr;
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struct mac_info *mac_control;
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@ -850,7 +875,6 @@ static void free_shared_mem(struct s2io_nic *nic)
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lst_per_page = PAGE_SIZE / lst_size;
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for (i = 0; i < config->tx_fifo_num; i++) {
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ufo_size += config->tx_cfg[i].fifo_len;
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page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
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lst_per_page);
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for (j = 0; j < page_num; j++) {
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@ -940,18 +964,21 @@ static void free_shared_mem(struct s2io_nic *nic)
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}
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}
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for (i = 0; i < nic->config.tx_fifo_num; i++) {
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if (mac_control->fifos[i].ufo_in_band_v) {
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nic->mac_control.stats_info->sw_stat.mem_freed
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+= (config->tx_cfg[i].fifo_len * sizeof(u64));
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kfree(mac_control->fifos[i].ufo_in_band_v);
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}
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}
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if (mac_control->stats_mem) {
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nic->mac_control.stats_info->sw_stat.mem_freed +=
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mac_control->stats_mem_sz;
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pci_free_consistent(nic->pdev,
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mac_control->stats_mem_sz,
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mac_control->stats_mem,
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mac_control->stats_mem_phy);
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nic->mac_control.stats_info->sw_stat.mem_freed +=
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mac_control->stats_mem_sz;
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}
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if (nic->ufo_in_band_v) {
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kfree(nic->ufo_in_band_v);
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nic->mac_control.stats_info->sw_stat.mem_freed
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+= (ufo_size * sizeof(u64));
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}
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}
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@ -2241,7 +2268,7 @@ static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
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u16 j, frg_cnt;
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txds = txdlp;
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if (txds->Host_Control == (u64)(long)nic->ufo_in_band_v) {
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if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
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pci_unmap_single(nic->pdev, (dma_addr_t)
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txds->Buffer_Pointer, sizeof(u64),
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PCI_DMA_TODEVICE);
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@ -2296,6 +2323,8 @@ static void free_tx_buffers(struct s2io_nic *nic)
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config = &nic->config;
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for (i = 0; i < config->tx_fifo_num; i++) {
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unsigned long flags;
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spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags);
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for (j = 0; j < config->tx_cfg[i].fifo_len - 1; j++) {
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txdp = (struct TxD *) \
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mac_control->fifos[i].list_info[j].list_virt_addr;
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@ -2312,6 +2341,7 @@ static void free_tx_buffers(struct s2io_nic *nic)
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dev->name, cnt, i);
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mac_control->fifos[i].tx_curr_get_info.offset = 0;
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mac_control->fifos[i].tx_curr_put_info.offset = 0;
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spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock, flags);
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}
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}
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@ -2932,8 +2962,12 @@ static void tx_intr_handler(struct fifo_info *fifo_data)
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struct tx_curr_get_info get_info, put_info;
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struct sk_buff *skb;
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struct TxD *txdlp;
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unsigned long flags = 0;
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u8 err_mask;
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if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
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return;
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get_info = fifo_data->tx_curr_get_info;
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memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
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txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
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@ -2982,6 +3016,7 @@ static void tx_intr_handler(struct fifo_info *fifo_data)
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skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
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if (skb == NULL) {
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spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
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DBG_PRINT(ERR_DBG, "%s: Null skb ",
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__FUNCTION__);
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DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
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@ -3002,10 +3037,10 @@ static void tx_intr_handler(struct fifo_info *fifo_data)
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get_info.offset;
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}
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spin_lock(&nic->tx_lock);
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if (netif_queue_stopped(dev))
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netif_wake_queue(dev);
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spin_unlock(&nic->tx_lock);
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spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
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}
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/**
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@ -3965,9 +4000,10 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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register u64 val64;
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struct TxD *txdp;
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struct TxFIFO_element __iomem *tx_fifo;
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unsigned long flags;
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unsigned long flags = 0;
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u16 vlan_tag = 0;
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int vlan_priority = 0;
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struct fifo_info *fifo = NULL;
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struct mac_info *mac_control;
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struct config_param *config;
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int offload_type;
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@ -3982,13 +4018,11 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
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dev_kfree_skb_any(skb);
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return 0;
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}
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}
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spin_lock_irqsave(&sp->tx_lock, flags);
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if (!is_s2io_card_up(sp)) {
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DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
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dev->name);
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spin_unlock_irqrestore(&sp->tx_lock, flags);
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dev_kfree_skb(skb);
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return 0;
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}
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@ -4001,19 +4035,20 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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queue = config->fifo_mapping[vlan_priority];
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}
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put_off = (u16) mac_control->fifos[queue].tx_curr_put_info.offset;
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get_off = (u16) mac_control->fifos[queue].tx_curr_get_info.offset;
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txdp = (struct TxD *) mac_control->fifos[queue].list_info[put_off].
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list_virt_addr;
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fifo = &mac_control->fifos[queue];
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spin_lock_irqsave(&fifo->tx_lock, flags);
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put_off = (u16) fifo->tx_curr_put_info.offset;
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get_off = (u16) fifo->tx_curr_get_info.offset;
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txdp = (struct TxD *) fifo->list_info[put_off].list_virt_addr;
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queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
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queue_len = fifo->tx_curr_put_info.fifo_len + 1;
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/* Avoid "put" pointer going beyond "get" pointer */
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if (txdp->Host_Control ||
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((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
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DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
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netif_stop_queue(dev);
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dev_kfree_skb(skb);
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spin_unlock_irqrestore(&sp->tx_lock, flags);
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spin_unlock_irqrestore(&fifo->tx_lock, flags);
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return 0;
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}
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@ -4029,7 +4064,7 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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}
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txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
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txdp->Control_1 |= TXD_LIST_OWN_XENA;
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txdp->Control_2 |= config->tx_intr_type;
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txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
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if (sp->vlgrp && vlan_tx_tag_present(skb)) {
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txdp->Control_2 |= TXD_VLAN_ENABLE;
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@ -4046,15 +4081,15 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
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txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
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#ifdef __BIG_ENDIAN
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sp->ufo_in_band_v[put_off] =
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fifo->ufo_in_band_v[put_off] =
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(u64)skb_shinfo(skb)->ip6_frag_id;
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#else
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sp->ufo_in_band_v[put_off] =
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fifo->ufo_in_band_v[put_off] =
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(u64)skb_shinfo(skb)->ip6_frag_id << 32;
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#endif
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txdp->Host_Control = (unsigned long)sp->ufo_in_band_v;
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txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
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txdp->Buffer_Pointer = pci_map_single(sp->pdev,
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sp->ufo_in_band_v,
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fifo->ufo_in_band_v,
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sizeof(u64), PCI_DMA_TODEVICE);
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if((txdp->Buffer_Pointer == 0) ||
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(txdp->Buffer_Pointer == DMA_ERROR_CODE))
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@ -4094,7 +4129,7 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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frg_cnt++; /* as Txd0 was used for inband header */
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tx_fifo = mac_control->tx_FIFO_start[queue];
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val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
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val64 = fifo->list_info[put_off].list_phy_addr;
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writeq(val64, &tx_fifo->TxDL_Pointer);
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val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
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@ -4107,9 +4142,9 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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mmiowb();
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put_off++;
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if (put_off == mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1)
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if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
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put_off = 0;
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mac_control->fifos[queue].tx_curr_put_info.offset = put_off;
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fifo->tx_curr_put_info.offset = put_off;
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/* Avoid "put" pointer going beyond "get" pointer */
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if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
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@ -4121,7 +4156,7 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
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}
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mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
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dev->trans_start = jiffies;
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spin_unlock_irqrestore(&sp->tx_lock, flags);
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spin_unlock_irqrestore(&fifo->tx_lock, flags);
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return 0;
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pci_map_failed:
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@ -4129,7 +4164,7 @@ pci_map_failed:
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netif_stop_queue(dev);
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stats->mem_freed += skb->truesize;
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dev_kfree_skb(skb);
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spin_unlock_irqrestore(&sp->tx_lock, flags);
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spin_unlock_irqrestore(&fifo->tx_lock, flags);
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return 0;
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}
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@ -6995,10 +7030,8 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
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if (do_io)
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s2io_reset(sp);
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spin_lock_irqsave(&sp->tx_lock, flags);
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/* Free all Tx buffers */
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free_tx_buffers(sp);
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spin_unlock_irqrestore(&sp->tx_lock, flags);
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/* Free all Rx buffers */
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spin_lock_irqsave(&sp->rx_lock, flags);
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@ -7462,12 +7495,18 @@ static void s2io_init_pci(struct s2io_nic * sp)
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static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type)
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{
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if ( tx_fifo_num > 8) {
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DBG_PRINT(ERR_DBG, "s2io: Requested number of Tx fifos not "
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"supported\n");
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DBG_PRINT(ERR_DBG, "s2io: Default to 8 Tx fifos\n");
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tx_fifo_num = 8;
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if ((tx_fifo_num > MAX_TX_FIFOS) ||
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(tx_fifo_num < FIFO_DEFAULT_NUM)) {
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DBG_PRINT(ERR_DBG, "s2io: Requested number of tx fifos "
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"(%d) not supported\n", tx_fifo_num);
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tx_fifo_num =
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((tx_fifo_num > MAX_TX_FIFOS)? MAX_TX_FIFOS :
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((tx_fifo_num < FIFO_DEFAULT_NUM) ? FIFO_DEFAULT_NUM :
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tx_fifo_num));
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DBG_PRINT(ERR_DBG, "s2io: Default to %d ", tx_fifo_num);
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DBG_PRINT(ERR_DBG, "tx fifos\n");
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}
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if ( rx_ring_num > 8) {
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DBG_PRINT(ERR_DBG, "s2io: Requested number of Rx rings not "
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"supported\n");
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@ -7846,7 +7885,8 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
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sp->state = 0;
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/* Initialize spinlocks */
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spin_lock_init(&sp->tx_lock);
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for (i = 0; i < sp->config.tx_fifo_num; i++)
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spin_lock_init(&mac_control->fifos[i].tx_lock);
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if (!napi)
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spin_lock_init(&sp->put_lock);
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@ -360,6 +360,8 @@ struct stat_block {
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#define MAX_TX_FIFOS 8
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#define MAX_RX_RINGS 8
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#define FIFO_DEFAULT_NUM 1
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#define MAX_RX_DESC_1 (MAX_RX_RINGS * MAX_RX_BLOCKS_PER_RING * 127 )
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#define MAX_RX_DESC_2 (MAX_RX_RINGS * MAX_RX_BLOCKS_PER_RING * 85 )
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#define MAX_RX_DESC_3 (MAX_RX_RINGS * MAX_RX_BLOCKS_PER_RING * 85 )
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@ -719,8 +721,14 @@ struct fifo_info {
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*/
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struct tx_curr_get_info tx_curr_get_info;
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/* Per fifo lock */
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spinlock_t tx_lock;
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/* Per fifo UFO in band structure */
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u64 *ufo_in_band_v;
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struct s2io_nic *nic;
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};
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} ____cacheline_aligned;
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/* Information related to the Tx and Rx FIFOs and Rings of Xena
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* is maintained in this structure.
|
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@ -848,7 +856,6 @@ struct s2io_nic {
|
||||
|
||||
atomic_t rx_bufs_left[MAX_RX_RINGS];
|
||||
|
||||
spinlock_t tx_lock;
|
||||
spinlock_t put_lock;
|
||||
|
||||
#define PROMISC 1
|
||||
@ -915,7 +922,6 @@ struct s2io_nic {
|
||||
volatile unsigned long state;
|
||||
spinlock_t rx_lock;
|
||||
u64 general_int_mask;
|
||||
u64 *ufo_in_band_v;
|
||||
#define VPD_STRING_LEN 80
|
||||
u8 product_name[VPD_STRING_LEN];
|
||||
u8 serial_num[VPD_STRING_LEN];
|
||||
|
||||
Loading…
Reference in New Issue
Block a user