arm64: entry: organise entry handlers consistently

In entry.S we have two comments which distinguish EL0 and EL1 exception
handlers, but the code isn't actually laid out to match, and there are a
few other inconsistencies that would be good to clear up.

This patch organizes the entry handers consistently:

* The handlers are laid out in order of the vectors, to make them easier
  to navigate.

* The inconsistently-applied alignment is removed

* The handlers are consistently marked with SYM_CODE_START_LOCAL()
  rather than SYM_CODE_START_LOCAL_NOALIGN(), giving them the same
  default alignment as other assembly code snippets.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20210607094624.34689-9-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Mark Rutland 2021-06-07 10:46:12 +01:00 committed by Will Deacon
parent 064dbfb416
commit 2f2bbaa4ed

View File

@ -607,87 +607,27 @@ SYM_CODE_END(el1_error_invalid)
/*
* EL1 mode handlers.
*/
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el1_sync)
SYM_CODE_START_LOCAL(el1_sync)
kernel_entry 1
mov x0, sp
bl el1_sync_handler
kernel_exit 1
SYM_CODE_END(el1_sync)
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el1_irq)
SYM_CODE_START_LOCAL(el1_irq)
kernel_entry 1
mov x0, sp
bl el1_irq_handler
kernel_exit 1
SYM_CODE_END(el1_irq)
SYM_CODE_START_LOCAL_NOALIGN(el1_fiq)
SYM_CODE_START_LOCAL(el1_fiq)
kernel_entry 1
mov x0, sp
bl el1_fiq_handler
kernel_exit 1
SYM_CODE_END(el1_fiq)
/*
* EL0 mode handlers.
*/
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el0_sync)
kernel_entry 0
mov x0, sp
bl el0_sync_handler
b ret_to_user
SYM_CODE_END(el0_sync)
#ifdef CONFIG_COMPAT
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el0_sync_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_sync_compat_handler
b ret_to_user
SYM_CODE_END(el0_sync_compat)
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el0_irq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_irq_compat_handler
b ret_to_user
SYM_CODE_END(el0_irq_compat)
SYM_CODE_START_LOCAL_NOALIGN(el0_fiq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_fiq_compat_handler
b ret_to_user
SYM_CODE_END(el0_fiq_compat)
SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_error_compat_handler
b ret_to_user
SYM_CODE_END(el0_error_compat)
#endif
.align 6
SYM_CODE_START_LOCAL_NOALIGN(el0_irq)
kernel_entry 0
mov x0, sp
bl el0_irq_handler
b ret_to_user
SYM_CODE_END(el0_irq)
SYM_CODE_START_LOCAL_NOALIGN(el0_fiq)
kernel_entry 0
mov x0, sp
bl el0_fiq_handler
b ret_to_user
SYM_CODE_END(el0_fiq)
SYM_CODE_START_LOCAL(el1_error)
kernel_entry 1
mov x0, sp
@ -695,6 +635,30 @@ SYM_CODE_START_LOCAL(el1_error)
kernel_exit 1
SYM_CODE_END(el1_error)
/*
* EL0 mode handlers.
*/
SYM_CODE_START_LOCAL(el0_sync)
kernel_entry 0
mov x0, sp
bl el0_sync_handler
b ret_to_user
SYM_CODE_END(el0_sync)
SYM_CODE_START_LOCAL(el0_irq)
kernel_entry 0
mov x0, sp
bl el0_irq_handler
b ret_to_user
SYM_CODE_END(el0_irq)
SYM_CODE_START_LOCAL(el0_fiq)
kernel_entry 0
mov x0, sp
bl el0_fiq_handler
b ret_to_user
SYM_CODE_END(el0_fiq)
SYM_CODE_START_LOCAL(el0_error)
kernel_entry 0
mov x0, sp
@ -702,6 +666,36 @@ SYM_CODE_START_LOCAL(el0_error)
b ret_to_user
SYM_CODE_END(el0_error)
#ifdef CONFIG_COMPAT
SYM_CODE_START_LOCAL(el0_sync_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_sync_compat_handler
b ret_to_user
SYM_CODE_END(el0_sync_compat)
SYM_CODE_START_LOCAL(el0_irq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_irq_compat_handler
b ret_to_user
SYM_CODE_END(el0_irq_compat)
SYM_CODE_START_LOCAL(el0_fiq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_fiq_compat_handler
b ret_to_user
SYM_CODE_END(el0_fiq_compat)
SYM_CODE_START_LOCAL(el0_error_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_error_compat_handler
b ret_to_user
SYM_CODE_END(el0_error_compat)
#endif
/*
* "slow" syscall return path.
*/