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media: sun6i-csi: Tidy capture configure code
Some misc code cleanups and preparation for upcoming changes. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -353,133 +353,120 @@ static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_device *csi_dev,
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static void
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sun6i_csi_capture_configure_interface(struct sun6i_csi_device *csi_dev)
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{
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struct device *dev = csi_dev->dev;
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struct regmap *regmap = csi_dev->regmap;
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struct v4l2_fwnode_endpoint *endpoint =
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&csi_dev->bridge.source_parallel.endpoint;
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unsigned char bus_width = endpoint->bus.parallel.bus_width;
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unsigned int flags = endpoint->bus.parallel.flags;
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u32 pixelformat, field;
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unsigned char bus_width;
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u32 flags;
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u32 cfg = 0;
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bool input_interlaced = false;
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u32 value = SUN6I_CSI_IF_CFG_IF_CSI;
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sun6i_csi_capture_format(csi_dev, &pixelformat, &field);
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if (field == V4L2_FIELD_INTERLACED ||
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field == V4L2_FIELD_INTERLACED_TB ||
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field == V4L2_FIELD_INTERLACED_BT)
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input_interlaced = true;
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bus_width = endpoint->bus.parallel.bus_width;
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if (input_interlaced)
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cfg |= SUN6I_CSI_IF_CFG_SRC_TYPE_INTERLACED |
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SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(1) |
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SUN6I_CSI_IF_CFG_FIELD_DT_FIELD_VSYNC;
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value |= SUN6I_CSI_IF_CFG_SRC_TYPE_INTERLACED |
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SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(1) |
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SUN6I_CSI_IF_CFG_FIELD_DT_FIELD_VSYNC;
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else
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cfg |= SUN6I_CSI_IF_CFG_SRC_TYPE_PROGRESSIVE;
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value |= SUN6I_CSI_IF_CFG_SRC_TYPE_PROGRESSIVE;
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switch (endpoint->bus_type) {
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case V4L2_MBUS_PARALLEL:
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI;
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flags = endpoint->bus.parallel.flags;
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if (bus_width == 16)
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI_YUV_COMBINED;
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value |= SUN6I_CSI_IF_CFG_IF_CSI_YUV_COMBINED;
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else
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI_YUV_RAW;
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value |= SUN6I_CSI_IF_CFG_IF_CSI_YUV_RAW;
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if (flags & V4L2_MBUS_FIELD_EVEN_LOW)
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cfg |= SUN6I_CSI_IF_CFG_FIELD_NEGATIVE;
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value |= SUN6I_CSI_IF_CFG_FIELD_NEGATIVE;
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else
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cfg |= SUN6I_CSI_IF_CFG_FIELD_POSITIVE;
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value |= SUN6I_CSI_IF_CFG_FIELD_POSITIVE;
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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cfg |= SUN6I_CSI_IF_CFG_VREF_POL_NEGATIVE;
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value |= SUN6I_CSI_IF_CFG_VREF_POL_NEGATIVE;
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else
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cfg |= SUN6I_CSI_IF_CFG_VREF_POL_POSITIVE;
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value |= SUN6I_CSI_IF_CFG_VREF_POL_POSITIVE;
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
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cfg |= SUN6I_CSI_IF_CFG_HREF_POL_NEGATIVE;
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value |= SUN6I_CSI_IF_CFG_HREF_POL_NEGATIVE;
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else
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cfg |= SUN6I_CSI_IF_CFG_HREF_POL_POSITIVE;
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value |= SUN6I_CSI_IF_CFG_HREF_POL_POSITIVE;
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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cfg |= SUN6I_CSI_IF_CFG_CLK_POL_RISING;
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value |= SUN6I_CSI_IF_CFG_CLK_POL_RISING;
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else
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cfg |= SUN6I_CSI_IF_CFG_CLK_POL_FALLING;
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value |= SUN6I_CSI_IF_CFG_CLK_POL_FALLING;
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break;
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case V4L2_MBUS_BT656:
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI;
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flags = endpoint->bus.parallel.flags;
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if (bus_width == 16)
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI_BT1120;
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value |= SUN6I_CSI_IF_CFG_IF_CSI_BT1120;
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else
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cfg |= SUN6I_CSI_IF_CFG_IF_CSI_BT656;
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value |= SUN6I_CSI_IF_CFG_IF_CSI_BT656;
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if (flags & V4L2_MBUS_FIELD_EVEN_LOW)
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cfg |= SUN6I_CSI_IF_CFG_FIELD_NEGATIVE;
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value |= SUN6I_CSI_IF_CFG_FIELD_NEGATIVE;
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else
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cfg |= SUN6I_CSI_IF_CFG_FIELD_POSITIVE;
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value |= SUN6I_CSI_IF_CFG_FIELD_POSITIVE;
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if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
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cfg |= SUN6I_CSI_IF_CFG_CLK_POL_RISING;
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value |= SUN6I_CSI_IF_CFG_CLK_POL_RISING;
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else
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cfg |= SUN6I_CSI_IF_CFG_CLK_POL_FALLING;
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value |= SUN6I_CSI_IF_CFG_CLK_POL_FALLING;
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break;
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default:
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dev_warn(csi_dev->dev, "Unsupported bus type: %d\n",
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endpoint->bus_type);
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dev_warn(dev, "unsupported bus type: %d\n", endpoint->bus_type);
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break;
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}
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switch (bus_width) {
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case 8:
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cfg |= SUN6I_CSI_IF_CFG_DATA_WIDTH_8;
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/* 16-bit YUV formats use a doubled width in 8-bit mode. */
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case 16:
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value |= SUN6I_CSI_IF_CFG_DATA_WIDTH_8;
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break;
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case 10:
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cfg |= SUN6I_CSI_IF_CFG_DATA_WIDTH_10;
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value |= SUN6I_CSI_IF_CFG_DATA_WIDTH_10;
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break;
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case 12:
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cfg |= SUN6I_CSI_IF_CFG_DATA_WIDTH_12;
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break;
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case 16: /* No need to configure DATA_WIDTH for 16bit */
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value |= SUN6I_CSI_IF_CFG_DATA_WIDTH_12;
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break;
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default:
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dev_warn(csi_dev->dev, "Unsupported bus width: %u\n", bus_width);
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dev_warn(dev, "unsupported bus width: %u\n", bus_width);
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break;
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}
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regmap_write(csi_dev->regmap, SUN6I_CSI_IF_CFG_REG, cfg);
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regmap_write(regmap, SUN6I_CSI_IF_CFG_REG, value);
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}
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static void sun6i_csi_capture_configure_format(struct sun6i_csi_device *csi_dev)
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{
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struct regmap *regmap = csi_dev->regmap;
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u32 mbus_code, pixelformat, field;
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u32 cfg = 0;
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u32 val;
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u8 input_format, input_yuv_seq, output_format;
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u32 value = 0;
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sun6i_csi_capture_format(csi_dev, &pixelformat, &field);
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sun6i_csi_bridge_format(csi_dev, &mbus_code, NULL);
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val = get_csi_input_format(csi_dev, mbus_code, pixelformat);
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cfg |= SUN6I_CSI_CH_CFG_INPUT_FMT(val);
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input_format = get_csi_input_format(csi_dev, mbus_code, pixelformat);
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input_yuv_seq = get_csi_input_seq(csi_dev, mbus_code, pixelformat);
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output_format = get_csi_output_format(csi_dev, pixelformat, field);
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val = get_csi_output_format(csi_dev, pixelformat, field);
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cfg |= SUN6I_CSI_CH_CFG_OUTPUT_FMT(val);
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val = get_csi_input_seq(csi_dev, mbus_code, pixelformat);
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cfg |= SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(val);
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value |= SUN6I_CSI_CH_CFG_OUTPUT_FMT(output_format);
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value |= SUN6I_CSI_CH_CFG_INPUT_FMT(input_format);
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value |= SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(input_yuv_seq);
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if (field == V4L2_FIELD_TOP)
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cfg |= SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD0;
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value |= SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD0;
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else if (field == V4L2_FIELD_BOTTOM)
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cfg |= SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD1;
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value |= SUN6I_CSI_CH_CFG_FIELD_SEL_FIELD1;
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else
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cfg |= SUN6I_CSI_CH_CFG_FIELD_SEL_EITHER;
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value |= SUN6I_CSI_CH_CFG_FIELD_SEL_EITHER;
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regmap_write(csi_dev->regmap, SUN6I_CSI_CH_CFG_REG, cfg);
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regmap_write(regmap, SUN6I_CSI_CH_CFG_REG, value);
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}
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static void sun6i_csi_capture_configure_window(struct sun6i_csi_device *csi_dev)
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