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synced 2024-11-18 17:54:13 +08:00
rt2x00: Factor out RXWI processing to common rt2800 code.
RXWI processing is exactly the same for rt2800pci and rt2800usb, so make it common code. Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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59679b91d1
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@ -335,6 +335,50 @@ void rt2800_write_txwi(struct sk_buff *skb, struct txentry_desc *txdesc)
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}
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EXPORT_SYMBOL_GPL(rt2800_write_txwi);
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void rt2800_process_rxwi(struct sk_buff *skb, struct rxdone_entry_desc *rxdesc)
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{
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__le32 *rxwi = (__le32 *) skb->data;
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u32 word;
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rt2x00_desc_read(rxwi, 0, &word);
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rxdesc->cipher = rt2x00_get_field32(word, RXWI_W0_UDF);
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rxdesc->size = rt2x00_get_field32(word, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
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rt2x00_desc_read(rxwi, 1, &word);
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if (rt2x00_get_field32(word, RXWI_W1_SHORT_GI))
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rxdesc->flags |= RX_FLAG_SHORT_GI;
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if (rt2x00_get_field32(word, RXWI_W1_BW))
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rxdesc->flags |= RX_FLAG_40MHZ;
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/*
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* Detect RX rate, always use MCS as signal type.
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*/
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rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
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rxdesc->signal = rt2x00_get_field32(word, RXWI_W1_MCS);
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rxdesc->rate_mode = rt2x00_get_field32(word, RXWI_W1_PHYMODE);
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/*
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* Mask of 0x8 bit to remove the short preamble flag.
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*/
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if (rxdesc->rate_mode == RATE_MODE_CCK)
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rxdesc->signal &= ~0x8;
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rt2x00_desc_read(rxwi, 2, &word);
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rxdesc->rssi =
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(rt2x00_get_field32(word, RXWI_W2_RSSI0) +
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rt2x00_get_field32(word, RXWI_W2_RSSI1)) / 2;
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/*
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* Remove RXWI descriptor from start of buffer.
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*/
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skb_pull(skb, RXWI_DESC_SIZE);
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}
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EXPORT_SYMBOL_GPL(rt2800_process_rxwi);
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#ifdef CONFIG_RT2X00_LIB_DEBUGFS
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const struct rt2x00debug rt2800_rt2x00debug = {
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.owner = THIS_MODULE,
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@ -112,6 +112,7 @@ void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
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const u8 arg0, const u8 arg1);
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void rt2800_write_txwi(struct sk_buff *skb, struct txentry_desc *txdesc);
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void rt2800_process_rxwi(struct sk_buff *skb, struct rxdone_entry_desc *txdesc);
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extern const struct rt2x00debug rt2800_rt2x00debug;
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@ -770,20 +770,11 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
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struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
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struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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__le32 *rxd = entry_priv->desc;
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__le32 *rxwi = (__le32 *)entry->skb->data;
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u32 rxd3;
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u32 rxwi0;
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u32 rxwi1;
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u32 rxwi2;
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u32 rxwi3;
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u32 word;
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rt2x00_desc_read(rxd, 3, &rxd3);
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rt2x00_desc_read(rxwi, 0, &rxwi0);
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rt2x00_desc_read(rxwi, 1, &rxwi1);
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rt2x00_desc_read(rxwi, 2, &rxwi2);
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rt2x00_desc_read(rxwi, 3, &rxwi3);
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rt2x00_desc_read(rxd, 3, &word);
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if (rt2x00_get_field32(rxd3, RXD_W3_CRC_ERROR))
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if (rt2x00_get_field32(word, RXD_W3_CRC_ERROR))
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rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
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/*
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@ -791,10 +782,9 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
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* decryption. This prevents us from correct providing
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* correct statistics through debugfs.
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*/
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rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
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rxdesc->cipher_status = rt2x00_get_field32(rxd3, RXD_W3_CIPHER_ERROR);
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rxdesc->cipher_status = rt2x00_get_field32(word, RXD_W3_CIPHER_ERROR);
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if (rt2x00_get_field32(rxd3, RXD_W3_DECRYPTED)) {
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if (rt2x00_get_field32(word, RXD_W3_DECRYPTED)) {
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/*
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* Hardware has stripped IV/EIV data from 802.11 frame during
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* decryption. Unfortunately the descriptor doesn't contain
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@ -809,47 +799,22 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
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rxdesc->flags |= RX_FLAG_MMIC_ERROR;
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}
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if (rt2x00_get_field32(rxd3, RXD_W3_MY_BSS))
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if (rt2x00_get_field32(word, RXD_W3_MY_BSS))
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rxdesc->dev_flags |= RXDONE_MY_BSS;
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if (rt2x00_get_field32(rxd3, RXD_W3_L2PAD))
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if (rt2x00_get_field32(word, RXD_W3_L2PAD))
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rxdesc->dev_flags |= RXDONE_L2PAD;
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if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
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rxdesc->flags |= RX_FLAG_SHORT_GI;
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if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
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rxdesc->flags |= RX_FLAG_40MHZ;
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/*
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* Detect RX rate, always use MCS as signal type.
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* Process the RXWI structure that is at the start of the buffer.
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*/
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rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
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rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
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rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
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/*
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* Mask of 0x8 bit to remove the short preamble flag.
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*/
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if (rxdesc->rate_mode == RATE_MODE_CCK)
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rxdesc->signal &= ~0x8;
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rxdesc->rssi =
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(rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
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rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
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rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
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rt2800_process_rxwi(entry->skb, rxdesc);
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/*
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* Set RX IDX in register to inform hardware that we have handled
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* this entry and it is available for reuse again.
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*/
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rt2800_register_write(rt2x00dev, RX_CRX_IDX, entry->entry_idx);
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/*
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* Remove TXWI descriptor from start of buffer.
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*/
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skb_pull(entry->skb, RXWI_DESC_SIZE);
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}
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/*
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@ -507,53 +507,45 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
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__le32 *rxi = (__le32 *)entry->skb->data;
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__le32 *rxwi;
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__le32 *rxd;
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u32 rxi0;
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u32 rxwi0;
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u32 rxwi1;
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u32 rxwi2;
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u32 rxwi3;
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u32 rxd0;
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u32 word;
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int rx_pkt_len;
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/*
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* RX frame format is :
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* | RXINFO | RXWI | header | L2 pad | payload | pad | RXD | USB pad |
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* |<------------ rx_pkt_len -------------->|
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*/
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rt2x00_desc_read(rxi, 0, &rxi0);
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rx_pkt_len = rt2x00_get_field32(rxi0, RXINFO_W0_USB_DMA_RX_PKT_LEN);
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rxwi = (__le32 *)(entry->skb->data + RXINFO_DESC_SIZE);
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/*
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* FIXME : we need to check for rx_pkt_len validity
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*/
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rxd = (__le32 *)(entry->skb->data + RXINFO_DESC_SIZE + rx_pkt_len);
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/*
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* Copy descriptor to the skbdesc->desc buffer, making it safe from
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* moving of frame data in rt2x00usb.
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*/
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memcpy(skbdesc->desc, rxi, skbdesc->desc_len);
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/*
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* RX frame format is :
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* | RXINFO | RXWI | header | L2 pad | payload | pad | RXD | USB pad |
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* |<------------ rx_pkt_len -------------->|
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*/
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rt2x00_desc_read(rxi, 0, &word);
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rx_pkt_len = rt2x00_get_field32(word, RXINFO_W0_USB_DMA_RX_PKT_LEN);
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/*
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* Remove the RXINFO structure from the sbk.
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*/
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skb_pull(entry->skb, RXINFO_DESC_SIZE);
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/*
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* FIXME: we need to check for rx_pkt_len validity
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*/
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rxd = (__le32 *)(entry->skb->data + rx_pkt_len);
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/*
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* It is now safe to read the descriptor on all architectures.
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*/
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rt2x00_desc_read(rxwi, 0, &rxwi0);
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rt2x00_desc_read(rxwi, 1, &rxwi1);
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rt2x00_desc_read(rxwi, 2, &rxwi2);
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rt2x00_desc_read(rxwi, 3, &rxwi3);
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rt2x00_desc_read(rxd, 0, &rxd0);
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rt2x00_desc_read(rxd, 0, &word);
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if (rt2x00_get_field32(rxd0, RXD_W0_CRC_ERROR))
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if (rt2x00_get_field32(word, RXD_W0_CRC_ERROR))
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rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
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rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
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rxdesc->cipher_status = rt2x00_get_field32(rxd0, RXD_W0_CIPHER_ERROR);
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rxdesc->cipher_status = rt2x00_get_field32(word, RXD_W0_CIPHER_ERROR);
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if (rt2x00_get_field32(rxd0, RXD_W0_DECRYPTED)) {
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if (rt2x00_get_field32(word, RXD_W0_DECRYPTED)) {
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/*
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* Hardware has stripped IV/EIV data from 802.11 frame during
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* decryption. Unfortunately the descriptor doesn't contain
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@ -568,41 +560,21 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
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rxdesc->flags |= RX_FLAG_MMIC_ERROR;
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}
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if (rt2x00_get_field32(rxd0, RXD_W0_MY_BSS))
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if (rt2x00_get_field32(word, RXD_W0_MY_BSS))
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rxdesc->dev_flags |= RXDONE_MY_BSS;
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if (rt2x00_get_field32(rxd0, RXD_W0_L2PAD))
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if (rt2x00_get_field32(word, RXD_W0_L2PAD))
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rxdesc->dev_flags |= RXDONE_L2PAD;
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if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
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rxdesc->flags |= RX_FLAG_SHORT_GI;
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if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
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rxdesc->flags |= RX_FLAG_40MHZ;
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/*
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* Remove RXD descriptor from end of buffer.
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*/
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skb_trim(entry->skb, rx_pkt_len);
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/*
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* Detect RX rate, always use MCS as signal type.
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* Process the RXWI structure.
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*/
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rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
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rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
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rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
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/*
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* Mask of 0x8 bit to remove the short preamble flag.
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*/
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if (rxdesc->rate_mode == RATE_MODE_CCK)
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rxdesc->signal &= ~0x8;
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rxdesc->rssi =
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(rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
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rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
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rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
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/*
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* Remove RXWI descriptor from start of buffer.
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*/
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skb_pull(entry->skb, skbdesc->desc_len);
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rt2800_process_rxwi(entry->skb, rxdesc);
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}
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/*
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