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ASoC: Updates for v6.7
More updates for v6,7 following the early merge request: - Fixes for handling of component name prefixing when name prefixes are used by the machine driver. - Fixes for noise when stopping some Sounwire CODECs. - Support for AMD ACP 6.3 and 7.0, Awinc AW88399, more Intel platforms and more Qualcomm SC7180 platforms. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmU/rAQACgkQJNaLcl1U h9AXVwf/SwWrxTus3+O2hS5rwusjqQBn1t2mzlnxsYNVCYGBcjOpMGL4HrJzn++e DJXoMyWis5FNKFWyPtKMGE1kZYdUUE/g7LpZOBew4P47nBv6SQWRvUxPfoq8mdOg Xb4+kjBzTq1dhwZnZPvNdsknvM7cLfx/lyo2vUJR4peDL0rzgnx72fhRZAjzh2OH CSz69aTjpliqikp+V7JVFYf2yma2LjTOCL2saiIF/PcxsqUUa73XTggg610EPY+R pOFb2MBRDbZuJrETbaiytLwtcPuvrpiHRHhxuClsjHGVTDbGfE7GzePS+yUu66y9 LO8oAl7kJebw+WWffIOoL2IjXcG9tA== =nn11 -----END PGP SIGNATURE----- Merge tag 'asoc-v6.7-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v6.7 More updates for v6,7 following the early merge request: - Fixes for handling of component name prefixing when name prefixes are used by the machine driver. - Fixes for noise when stopping some Sounwire CODECs. - Support for AMD ACP 6.3 and 7.0, Awinc AW88399, more Intel platforms and more Qualcomm SC7180 platforms.
This commit is contained in:
commit
2dc15ff73b
1
.mailmap
1
.mailmap
@ -377,6 +377,7 @@ Matthew Wilcox <willy@infradead.org> <willy@debian.org>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org>
|
||||
Matthias Fuchs <socketcan@esd.eu> <matthias.fuchs@esd.eu>
|
||||
Matthieu Baerts <matttbe@kernel.org> <matthieu.baerts@tessares.net>
|
||||
Matthieu CASTET <castet.matthieu@free.fr>
|
||||
Matti Vaittinen <mazziesaccount@gmail.com> <matti.vaittinen@fi.rohmeurope.com>
|
||||
Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
||||
|
@ -1,7 +1,7 @@
|
||||
What: /sys/class/firmware/.../data
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: The data sysfs file is used for firmware-fallback and for
|
||||
firmware uploads. Cat a firmware image to this sysfs file
|
||||
after you echo 1 to the loading sysfs file. When the firmware
|
||||
@ -13,7 +13,7 @@ Description: The data sysfs file is used for firmware-fallback and for
|
||||
What: /sys/class/firmware/.../cancel
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: Write-only. For firmware uploads, write a "1" to this file to
|
||||
request that the transfer of firmware data to the lower-level
|
||||
device be canceled. This request will be rejected (EBUSY) if
|
||||
@ -23,7 +23,7 @@ Description: Write-only. For firmware uploads, write a "1" to this file to
|
||||
What: /sys/class/firmware/.../error
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: Read-only. Returns a string describing a failed firmware
|
||||
upload. This string will be in the form of <STATUS>:<ERROR>,
|
||||
where <STATUS> will be one of the status strings described
|
||||
@ -37,7 +37,7 @@ Description: Read-only. Returns a string describing a failed firmware
|
||||
What: /sys/class/firmware/.../loading
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: The loading sysfs file is used for both firmware-fallback and
|
||||
for firmware uploads. Echo 1 onto the loading file to indicate
|
||||
you are writing a firmware file to the data sysfs node. Echo
|
||||
@ -49,7 +49,7 @@ Description: The loading sysfs file is used for both firmware-fallback and
|
||||
What: /sys/class/firmware/.../remaining_size
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: Read-only. For firmware upload, this file contains the size
|
||||
of the firmware data that remains to be transferred to the
|
||||
lower-level device driver. The size value is initialized to
|
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@ -62,7 +62,7 @@ Description: Read-only. For firmware upload, this file contains the size
|
||||
What: /sys/class/firmware/.../status
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||||
Date: July 2022
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KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: Read-only. Returns a string describing the current status of
|
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a firmware upload. The string will be one of the following:
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idle, "receiving", "preparing", "transferring", "programming".
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@ -70,7 +70,7 @@ Description: Read-only. Returns a string describing the current status of
|
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What: /sys/class/firmware/.../timeout
|
||||
Date: July 2022
|
||||
KernelVersion: 5.19
|
||||
Contact: Russ Weight <russell.h.weight@intel.com>
|
||||
Contact: Russ Weight <russ.weight@linux.dev>
|
||||
Description: This file supports the timeout mechanism for firmware
|
||||
fallback. This file has no affect on firmware uploads. For
|
||||
more information on timeouts please see the documentation
|
||||
|
@ -92,6 +92,13 @@ Brief summary of control files.
|
||||
memory.oom_control set/show oom controls.
|
||||
memory.numa_stat show the number of memory usage per numa
|
||||
node
|
||||
memory.kmem.limit_in_bytes Deprecated knob to set and read the kernel
|
||||
memory hard limit. Kernel hard limit is not
|
||||
supported since 5.16. Writing any value to
|
||||
do file will not have any effect same as if
|
||||
nokmem kernel parameter was specified.
|
||||
Kernel memory is still charged and reported
|
||||
by memory.kmem.usage_in_bytes.
|
||||
memory.kmem.usage_in_bytes show current kernel memory allocation
|
||||
memory.kmem.failcnt show the number of kernel memory usage
|
||||
hits limits
|
||||
|
@ -175,6 +175,8 @@ infrastructure:
|
||||
+------------------------------+---------+---------+
|
||||
| Name | bits | visible |
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||||
+------------------------------+---------+---------+
|
||||
| SME | [27-24] | y |
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||||
+------------------------------+---------+---------+
|
||||
| MTE | [11-8] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| SSBS | [7-4] | y |
|
||||
@ -288,8 +290,18 @@ infrastructure:
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||||
+------------------------------+---------+---------+
|
||||
| Name | bits | visible |
|
||||
+------------------------------+---------+---------+
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||||
| CSSC | [55-52] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| RPRFM | [51-48] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| BC | [23-20] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| MOPS | [19-16] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| APA3 | [15-12] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| GPA3 | [11-8] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| RPRES | [7-4] | y |
|
||||
+------------------------------+---------+---------+
|
||||
| WFXT | [3-0] | y |
|
||||
|
@ -305,6 +305,9 @@ HWCAP2_SMEF16F16
|
||||
HWCAP2_MOPS
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Functionality implied by ID_AA64ISAR2_EL1.MOPS == 0b0001.
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|
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HWCAP2_HBC
|
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Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001.
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|
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4. Unused AT_HWCAP bits
|
||||
-----------------------
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|
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|
@ -71,6 +71,8 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |
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||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A520 | #2966298 | ARM64_ERRATUM_2966298 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
|
||||
|
@ -381,9 +381,9 @@ Documentation of LoongArch ISA:
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||||
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Documentation of LoongArch ELF psABI:
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||||
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||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-CN.pdf (in Chinese)
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-CN.pdf (in Chinese)
|
||||
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-EN.pdf (in English)
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-EN.pdf (in English)
|
||||
|
||||
Linux kernel repository of Loongson and LoongArch:
|
||||
|
||||
|
@ -244,7 +244,7 @@ unbound worker-pools and only one work item could be active at any given
|
||||
time thus achieving the same ordering property as ST wq.
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||||
|
||||
In the current implementation the above configuration only guarantees
|
||||
ST behavior within a given NUMA node. Instead ``alloc_ordered_queue()`` should
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||||
ST behavior within a given NUMA node. Instead ``alloc_ordered_workqueue()`` should
|
||||
be used to achieve system-wide ST behavior.
|
||||
|
||||
|
||||
@ -390,7 +390,7 @@ The default affinity scope can be changed with the module parameter
|
||||
scope can be changed using ``apply_workqueue_attrs()``.
|
||||
|
||||
If ``WQ_SYSFS`` is set, the workqueue will have the following affinity scope
|
||||
related interface files under its ``/sys/devices/virtual/WQ_NAME/``
|
||||
related interface files under its ``/sys/devices/virtual/workqueue/WQ_NAME/``
|
||||
directory.
|
||||
|
||||
``affinity_scope``
|
||||
|
@ -38,6 +38,7 @@ patternProperties:
|
||||
ID number 0 and the slave drive will have ID number 1. The PATA port
|
||||
nodes will be named "ide-port".
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
reg:
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||||
|
@ -73,9 +73,6 @@ patternProperties:
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||||
"^.*@[0-9a-f]+$":
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||||
description: Devices attached to the bus
|
||||
type: object
|
||||
properties:
|
||||
reg:
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||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
@ -69,7 +69,7 @@ examples:
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||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
cache-controller@2010000 {
|
||||
cache-controller@13400000 {
|
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compatible = "andestech,ax45mp-cache", "cache";
|
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reg = <0x13400000 0x100000>;
|
||||
interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;
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||||
|
@ -37,6 +37,9 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
description:
|
||||
The index in the assigned-clocks is mapped to the output clock as below
|
||||
0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2.
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||||
const: 1
|
||||
|
||||
clocks:
|
||||
@ -68,7 +71,7 @@ examples:
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||||
reg = <0x68>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
clocks = <&x1_x2>;
|
||||
clocks = <&x1>;
|
||||
|
||||
renesas,settings = [
|
||||
80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
|
||||
@ -79,8 +82,8 @@ examples:
|
||||
assigned-clocks = <&versa3 0>, <&versa3 1>,
|
||||
<&versa3 2>, <&versa3 3>,
|
||||
<&versa3 4>, <&versa3 5>;
|
||||
assigned-clock-rates = <12288000>, <25000000>,
|
||||
<12000000>, <11289600>,
|
||||
<11289600>, <24000000>;
|
||||
assigned-clock-rates = <24000000>, <11289600>,
|
||||
<11289600>, <12000000>,
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||||
<25000000>, <12288000>;
|
||||
};
|
||||
};
|
||||
|
@ -87,7 +87,7 @@ required:
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||||
- interrupts
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
@ -13,6 +13,8 @@ description: |
|
||||
|
||||
maintainers:
|
||||
- Michael Tretter <m.tretter@pengutronix.de>
|
||||
- Harini Katakam <harini.katakam@amd.com>
|
||||
- Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
|
||||
|
||||
allOf:
|
||||
- $ref: ../dma-controller.yaml#
|
||||
@ -65,6 +67,7 @@ required:
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- xlnx,bus-width
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
@ -9,6 +9,9 @@ title: Freescale MXS Inter IC (I2C) Controller
|
||||
maintainers:
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
@ -37,7 +40,7 @@ required:
|
||||
- dmas
|
||||
- dma-names
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
@ -61,7 +61,7 @@ patternProperties:
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: true
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
@ -45,5 +45,6 @@ examples:
|
||||
light-sensor@38 {
|
||||
compatible = "rohm,bu27010";
|
||||
reg = <0x38>;
|
||||
vdd-supply = <&vdd>;
|
||||
};
|
||||
};
|
||||
|
@ -106,6 +106,12 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 4096
|
||||
|
||||
dma-noncoherent:
|
||||
description:
|
||||
Present if the GIC redistributors permit programming shareability
|
||||
and cacheability attributes but are connected to a non-coherent
|
||||
downstream interconnect.
|
||||
|
||||
msi-controller:
|
||||
description:
|
||||
Only present if the Message Based Interrupt functionality is
|
||||
@ -193,6 +199,12 @@ patternProperties:
|
||||
compatible:
|
||||
const: arm,gic-v3-its
|
||||
|
||||
dma-noncoherent:
|
||||
description:
|
||||
Present if the GIC ITS permits programming shareability and
|
||||
cacheability attributes but is connected to a non-coherent
|
||||
downstream interconnect.
|
||||
|
||||
msi-controller: true
|
||||
|
||||
"#msi-cells":
|
||||
|
@ -37,6 +37,7 @@ properties:
|
||||
- renesas,intc-ex-r8a77990 # R-Car E3
|
||||
- renesas,intc-ex-r8a77995 # R-Car D3
|
||||
- renesas,intc-ex-r8a779a0 # R-Car V3U
|
||||
- renesas,intc-ex-r8a779f0 # R-Car S4-8
|
||||
- renesas,intc-ex-r8a779g0 # R-Car V4H
|
||||
- const: renesas,irqc
|
||||
|
||||
|
@ -19,20 +19,19 @@ description: |
|
||||
- NMI edge select (NMI is not treated as NMI exception and supports fall edge and
|
||||
stand-up edge detection interrupts)
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a07g043u-irqc # RZ/G2UL
|
||||
- renesas,r9a07g044-irqc # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-irqc # RZ/V2L
|
||||
- const: renesas,rzg2l-irqc
|
||||
|
||||
'#interrupt-cells':
|
||||
description: The first cell should contain external interrupt number (IRQ0-7) and the
|
||||
second cell is used to specify the flag.
|
||||
description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the
|
||||
include/dt-bindings/interrupt-controller/irqc-rzg2l.h and the second
|
||||
cell is used to specify the flag.
|
||||
const: 2
|
||||
|
||||
'#address-cells':
|
||||
@ -44,7 +43,96 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 41
|
||||
minItems: 41
|
||||
items:
|
||||
- description: NMI interrupt
|
||||
- description: IRQ0 interrupt
|
||||
- description: IRQ1 interrupt
|
||||
- description: IRQ2 interrupt
|
||||
- description: IRQ3 interrupt
|
||||
- description: IRQ4 interrupt
|
||||
- description: IRQ5 interrupt
|
||||
- description: IRQ6 interrupt
|
||||
- description: IRQ7 interrupt
|
||||
- description: GPIO interrupt, TINT0
|
||||
- description: GPIO interrupt, TINT1
|
||||
- description: GPIO interrupt, TINT2
|
||||
- description: GPIO interrupt, TINT3
|
||||
- description: GPIO interrupt, TINT4
|
||||
- description: GPIO interrupt, TINT5
|
||||
- description: GPIO interrupt, TINT6
|
||||
- description: GPIO interrupt, TINT7
|
||||
- description: GPIO interrupt, TINT8
|
||||
- description: GPIO interrupt, TINT9
|
||||
- description: GPIO interrupt, TINT10
|
||||
- description: GPIO interrupt, TINT11
|
||||
- description: GPIO interrupt, TINT12
|
||||
- description: GPIO interrupt, TINT13
|
||||
- description: GPIO interrupt, TINT14
|
||||
- description: GPIO interrupt, TINT15
|
||||
- description: GPIO interrupt, TINT16
|
||||
- description: GPIO interrupt, TINT17
|
||||
- description: GPIO interrupt, TINT18
|
||||
- description: GPIO interrupt, TINT19
|
||||
- description: GPIO interrupt, TINT20
|
||||
- description: GPIO interrupt, TINT21
|
||||
- description: GPIO interrupt, TINT22
|
||||
- description: GPIO interrupt, TINT23
|
||||
- description: GPIO interrupt, TINT24
|
||||
- description: GPIO interrupt, TINT25
|
||||
- description: GPIO interrupt, TINT26
|
||||
- description: GPIO interrupt, TINT27
|
||||
- description: GPIO interrupt, TINT28
|
||||
- description: GPIO interrupt, TINT29
|
||||
- description: GPIO interrupt, TINT30
|
||||
- description: GPIO interrupt, TINT31
|
||||
- description: Bus error interrupt
|
||||
|
||||
interrupt-names:
|
||||
minItems: 41
|
||||
items:
|
||||
- const: nmi
|
||||
- const: irq0
|
||||
- const: irq1
|
||||
- const: irq2
|
||||
- const: irq3
|
||||
- const: irq4
|
||||
- const: irq5
|
||||
- const: irq6
|
||||
- const: irq7
|
||||
- const: tint0
|
||||
- const: tint1
|
||||
- const: tint2
|
||||
- const: tint3
|
||||
- const: tint4
|
||||
- const: tint5
|
||||
- const: tint6
|
||||
- const: tint7
|
||||
- const: tint8
|
||||
- const: tint9
|
||||
- const: tint10
|
||||
- const: tint11
|
||||
- const: tint12
|
||||
- const: tint13
|
||||
- const: tint14
|
||||
- const: tint15
|
||||
- const: tint16
|
||||
- const: tint17
|
||||
- const: tint18
|
||||
- const: tint19
|
||||
- const: tint20
|
||||
- const: tint21
|
||||
- const: tint22
|
||||
- const: tint23
|
||||
- const: tint24
|
||||
- const: tint25
|
||||
- const: tint26
|
||||
- const: tint27
|
||||
- const: tint28
|
||||
- const: tint29
|
||||
- const: tint30
|
||||
- const: tint31
|
||||
- const: bus-err
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
@ -72,6 +160,23 @@ required:
|
||||
- power-domains
|
||||
- resets
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a07g043u-irqc
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 42
|
||||
interrupt-names:
|
||||
minItems: 42
|
||||
required:
|
||||
- interrupt-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
@ -80,55 +185,66 @@ examples:
|
||||
#include <dt-bindings/clock/r9a07g044-cpg.h>
|
||||
|
||||
irqc: interrupt-controller@110a0000 {
|
||||
compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";
|
||||
reg = <0x110a0000 0x10000>;
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
|
||||
<&cpg CPG_MOD R9A07G044_IA55_PCLK>;
|
||||
clock-names = "clk", "pclk";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A07G044_IA55_RESETN>;
|
||||
compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";
|
||||
reg = <0x110a0000 0x10000>;
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "nmi",
|
||||
"irq0", "irq1", "irq2", "irq3",
|
||||
"irq4", "irq5", "irq6", "irq7",
|
||||
"tint0", "tint1", "tint2", "tint3",
|
||||
"tint4", "tint5", "tint6", "tint7",
|
||||
"tint8", "tint9", "tint10", "tint11",
|
||||
"tint12", "tint13", "tint14", "tint15",
|
||||
"tint16", "tint17", "tint18", "tint19",
|
||||
"tint20", "tint21", "tint22", "tint23",
|
||||
"tint24", "tint25", "tint26", "tint27",
|
||||
"tint28", "tint29", "tint30", "tint31";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
|
||||
<&cpg CPG_MOD R9A07G044_IA55_PCLK>;
|
||||
clock-names = "clk", "pclk";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A07G044_IA55_RESETN>;
|
||||
};
|
||||
|
@ -270,6 +270,7 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8998-smmu-v2
|
||||
- qcom,sdm630-smmu-v2
|
||||
then:
|
||||
anyOf:
|
||||
- properties:
|
||||
@ -311,7 +312,6 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm630-smmu-v2
|
||||
- qcom,sm6375-smmu-v2
|
||||
then:
|
||||
anyOf:
|
||||
|
@ -54,6 +54,7 @@ properties:
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
|
@ -69,6 +69,7 @@ properties:
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: Input port
|
||||
|
||||
properties:
|
||||
@ -89,6 +90,7 @@ properties:
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: Output port
|
||||
|
||||
properties:
|
||||
|
@ -59,7 +59,6 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8mq-csi
|
||||
- fsl,imx8mm-csi
|
||||
then:
|
||||
required:
|
||||
|
@ -95,7 +95,7 @@ properties:
|
||||
synchronization is selected.
|
||||
default: 1
|
||||
|
||||
field-active-even: true
|
||||
field-even-active: true
|
||||
|
||||
bus-width: true
|
||||
|
||||
@ -144,7 +144,7 @@ properties:
|
||||
synchronization is selected.
|
||||
default: 1
|
||||
|
||||
field-active-even: true
|
||||
field-even-active: true
|
||||
|
||||
bus-width: true
|
||||
|
||||
|
@ -57,6 +57,7 @@ properties:
|
||||
patternProperties:
|
||||
"^port@[01]$":
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description:
|
||||
Camera A and camera B inputs.
|
||||
|
||||
|
@ -31,10 +31,6 @@ properties:
|
||||
charger:
|
||||
$ref: /schemas/power/supply/maxim,max77693.yaml
|
||||
|
||||
connector:
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
led:
|
||||
$ref: /schemas/leds/maxim,max77693.yaml
|
||||
|
||||
|
@ -69,7 +69,7 @@ properties:
|
||||
maxItems: 4
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
minItems: 2
|
||||
items:
|
||||
- description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
|
||||
- description: SDC MMC clock, MCLK
|
||||
|
@ -12,7 +12,6 @@ maintainers:
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/pci/pci-bus.yaml#
|
||||
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
@ -34,13 +33,6 @@ properties:
|
||||
description: >
|
||||
Base address and length of the PCIe controller I/O register space
|
||||
|
||||
interrupt-map: true
|
||||
|
||||
interrupt-map-mask: true
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 1
|
||||
|
||||
ranges:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
@ -54,16 +46,8 @@ properties:
|
||||
items:
|
||||
- const: pcie-phy
|
||||
|
||||
bus-range: true
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
"#address-cells": true
|
||||
|
||||
"#size-cells": true
|
||||
|
||||
device_type: true
|
||||
|
||||
brcm,pcie-ob:
|
||||
type: boolean
|
||||
description: >
|
||||
@ -78,21 +62,25 @@ properties:
|
||||
|
||||
msi:
|
||||
type: object
|
||||
$ref: /schemas/interrupt-controller/msi-controller.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: brcm,iproc-msi
|
||||
|
||||
interrupts:
|
||||
maxItems: 4
|
||||
|
||||
brcm,pcie-msi-inten:
|
||||
type: boolean
|
||||
description:
|
||||
Needs to be present for some older iProc platforms that require the
|
||||
interrupt enable registers to be set explicitly to enable MSI
|
||||
|
||||
msi-parent: true
|
||||
|
||||
msi-controller: true
|
||||
|
||||
brcm,pcie-msi-inten:
|
||||
type: boolean
|
||||
description: >
|
||||
Needs to be present for some older iProc platforms that require the
|
||||
interrupt enable registers to be set explicitly to enable MSI
|
||||
|
||||
dependencies:
|
||||
brcm,pcie-ob-axi-offset: ["brcm,pcie-ob"]
|
||||
brcm,pcie-msi-inten: [msi-controller]
|
||||
@ -117,68 +105,69 @@ unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
pcie0: pcie@18012000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0x18012000 0x1000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
|
||||
|
||||
linux,pci-domain = <0>;
|
||||
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
|
||||
<0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
|
||||
|
||||
phys = <&phy 0 5>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
brcm,pcie-ob;
|
||||
brcm,pcie-ob-axi-offset = <0x00000000>;
|
||||
|
||||
msi-parent = <&msi0>;
|
||||
|
||||
/* iProc event queue based MSI */
|
||||
msi0: msi {
|
||||
compatible = "brcm,iproc-msi";
|
||||
msi-controller;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 97 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 98 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 99 IRQ_TYPE_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1: pcie@18013000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0x18013000 0x1000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
|
||||
linux,pci-domain = <1>;
|
||||
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
|
||||
<0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
|
||||
|
||||
phys = <&phy 1 6>;
|
||||
phy-names = "pcie-phy";
|
||||
};
|
||||
gic: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
pcie@18012000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0x18012000 0x1000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
|
||||
|
||||
linux,pci-domain = <0>;
|
||||
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
|
||||
<0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
|
||||
|
||||
phys = <&phy 0 5>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
brcm,pcie-ob;
|
||||
brcm,pcie-ob-axi-offset = <0x00000000>;
|
||||
|
||||
msi-parent = <&msi0>;
|
||||
|
||||
/* iProc event queue based MSI */
|
||||
msi0: msi {
|
||||
compatible = "brcm,iproc-msi";
|
||||
msi-controller;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 97 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 98 IRQ_TYPE_NONE>,
|
||||
<GIC_SPI 99 IRQ_TYPE_NONE>;
|
||||
};
|
||||
};
|
||||
- |
|
||||
pcie@18013000 {
|
||||
compatible = "brcm,iproc-pcie";
|
||||
reg = <0x18013000 0x1000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
|
||||
linux,pci-domain = <1>;
|
||||
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
|
||||
<0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
|
||||
|
||||
phys = <&phy 1 6>;
|
||||
phy-names = "pcie-phy";
|
||||
};
|
||||
|
@ -70,7 +70,7 @@ examples:
|
||||
|
||||
phy@84000 {
|
||||
compatible = "qcom,ipq6018-qmp-pcie-phy";
|
||||
reg = <0x0 0x00084000 0x0 0x1000>;
|
||||
reg = <0x00084000 0x1000>;
|
||||
|
||||
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
|
||||
<&gcc GCC_PCIE0_AHB_CLK>,
|
||||
|
@ -91,6 +91,7 @@ properties:
|
||||
|
||||
interrupt-controller:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description: Describes the CPU's local interrupt controller
|
||||
|
||||
properties:
|
||||
|
@ -11,11 +11,16 @@ maintainers:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- loongson,ls2k0500-pmc
|
||||
- loongson,ls2k1000-pmc
|
||||
- const: syscon
|
||||
oneOf:
|
||||
- items:
|
||||
- const: loongson,ls2k0500-pmc
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- loongson,ls2k1000-pmc
|
||||
- loongson,ls2k2000-pmc
|
||||
- const: loongson,ls2k0500-pmc
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -32,6 +37,18 @@ properties:
|
||||
addition, the PM need according to it to indicate that current
|
||||
SoC whether support Suspend To RAM.
|
||||
|
||||
syscon-poweroff:
|
||||
$ref: /schemas/power/reset/syscon-poweroff.yaml#
|
||||
type: object
|
||||
description:
|
||||
Node for power off method
|
||||
|
||||
syscon-reboot:
|
||||
$ref: /schemas/power/reset/syscon-reboot.yaml#
|
||||
type: object
|
||||
description:
|
||||
Node for reboot method
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -44,9 +61,23 @@ examples:
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
power-management@1fe27000 {
|
||||
compatible = "loongson,ls2k1000-pmc", "syscon";
|
||||
compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";
|
||||
reg = <0x1fe27000 0x58>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
loongson,suspend-address = <0x0 0x1c000500>;
|
||||
|
||||
syscon-reboot {
|
||||
compatible = "syscon-reboot";
|
||||
offset = <0x30>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
|
||||
syscon-poweroff {
|
||||
compatible = "syscon-poweroff";
|
||||
regmap = <&pmc>;
|
||||
offset = <0x14>;
|
||||
mask = <0x3c00>;
|
||||
value = <0x3c00>;
|
||||
};
|
||||
};
|
||||
|
@ -19,6 +19,7 @@ properties:
|
||||
enum:
|
||||
- awinic,aw88395
|
||||
- awinic,aw88261
|
||||
- awinic,aw88399
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
@ -25,6 +25,7 @@ properties:
|
||||
- qcom,apq8016-sbc-sndcard
|
||||
- qcom,msm8916-qdsp6-sndcard
|
||||
- qcom,qrb5165-rb5-sndcard
|
||||
- qcom,sc7180-qdsp6-sndcard
|
||||
- qcom,sc8280xp-sndcard
|
||||
- qcom,sdm845-sndcard
|
||||
- qcom,sm8250-sndcard
|
||||
|
@ -22,6 +22,13 @@ properties:
|
||||
- const: fsl,imx35-cspi
|
||||
- const: fsl,imx51-ecspi
|
||||
- const: fsl,imx53-ecspi
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx25-cspi
|
||||
- fsl,imx50-cspi
|
||||
- fsl,imx51-cspi
|
||||
- fsl,imx53-cspi
|
||||
- const: fsl,imx35-cspi
|
||||
- items:
|
||||
- const: fsl,imx8mp-ecspi
|
||||
- const: fsl,imx6ul-ecspi
|
||||
|
@ -232,7 +232,7 @@ properties:
|
||||
# MEMSIC magnetometer
|
||||
- memsic,mmc35240
|
||||
# MEMSIC 3-axis accelerometer
|
||||
- memsic,mx4005
|
||||
- memsic,mxc4005
|
||||
# MEMSIC 2-axis 8-bit digital accelerometer
|
||||
- memsic,mxc6225
|
||||
# MEMSIC 2-axis 8-bit digital accelerometer
|
||||
|
@ -37,7 +37,6 @@ For more information please refer to the documentation site or wiki
|
||||
|
||||
https://btrfs.readthedocs.io
|
||||
|
||||
https://btrfs.wiki.kernel.org
|
||||
|
||||
that maintains information about administration tasks, frequently asked
|
||||
questions, use cases, mount options, comprehensible changelogs, features,
|
||||
|
@ -58,12 +58,14 @@ Here are the main features of EROFS:
|
||||
|
||||
- Support extended attributes as an option;
|
||||
|
||||
- Support a bloom filter that speeds up negative extended attribute lookups;
|
||||
|
||||
- Support POSIX.1e ACLs by using extended attributes;
|
||||
|
||||
- Support transparent data compression as an option:
|
||||
LZ4 and MicroLZMA algorithms can be used on a per-file basis; In addition,
|
||||
inplace decompression is also supported to avoid bounce compressed buffers
|
||||
and page cache thrashing.
|
||||
LZ4, MicroLZMA and DEFLATE algorithms can be used on a per-file basis; In
|
||||
addition, inplace decompression is also supported to avoid bounce compressed
|
||||
buffers and unnecessary page cache thrashing.
|
||||
|
||||
- Support chunk-based data deduplication and rolling-hash compressed data
|
||||
deduplication;
|
||||
@ -268,6 +270,38 @@ details.)
|
||||
|
||||
By the way, chunk-based files are all uncompressed for now.
|
||||
|
||||
Long extended attribute name prefixes
|
||||
-------------------------------------
|
||||
There are use cases where extended attributes with different values can have
|
||||
only a few common prefixes (such as overlayfs xattrs). The predefined prefixes
|
||||
work inefficiently in both image size and runtime performance in such cases.
|
||||
|
||||
The long xattr name prefixes feature is introduced to address this issue. The
|
||||
overall idea is that, apart from the existing predefined prefixes, the xattr
|
||||
entry could also refer to user-specified long xattr name prefixes, e.g.
|
||||
"trusted.overlay.".
|
||||
|
||||
When referring to a long xattr name prefix, the highest bit (bit 7) of
|
||||
erofs_xattr_entry.e_name_index is set, while the lower bits (bit 0-6) as a whole
|
||||
represent the index of the referred long name prefix among all long name
|
||||
prefixes. Therefore, only the trailing part of the name apart from the long
|
||||
xattr name prefix is stored in erofs_xattr_entry.e_name, which could be empty if
|
||||
the full xattr name matches exactly as its long xattr name prefix.
|
||||
|
||||
All long xattr prefixes are stored one by one in the packed inode as long as
|
||||
the packed inode is valid, or in the meta inode otherwise. The
|
||||
xattr_prefix_count (of the on-disk superblock) indicates the total number of
|
||||
long xattr name prefixes, while (xattr_prefix_start * 4) indicates the start
|
||||
offset of long name prefixes in the packed/meta inode. Note that, long extended
|
||||
attribute name prefixes are disabled if xattr_prefix_count is 0.
|
||||
|
||||
Each long name prefix is stored in the format: ALIGN({__le16 len, data}, 4),
|
||||
where len represents the total size of the data part. The data part is actually
|
||||
represented by 'struct erofs_xattr_long_prefix', where base_index represents the
|
||||
index of the predefined xattr name prefix, e.g. EROFS_XATTR_INDEX_TRUSTED for
|
||||
"trusted.overlay." long name prefix, while the infix string keeps the string
|
||||
after stripping the short prefix, e.g. "overlay." for the example above.
|
||||
|
||||
Data compression
|
||||
----------------
|
||||
EROFS implements fixed-sized output compression which generates fixed-sized
|
||||
|
@ -339,6 +339,18 @@ The specified lower directories will be stacked beginning from the
|
||||
rightmost one and going left. In the above example lower1 will be the
|
||||
top, lower2 the middle and lower3 the bottom layer.
|
||||
|
||||
Note: directory names containing colons can be provided as lower layer by
|
||||
escaping the colons with a single backslash. For example:
|
||||
|
||||
mount -t overlay overlay -olowerdir=/a\:lower\:\:dir /merged
|
||||
|
||||
Since kernel version v6.5, directory names containing colons can also
|
||||
be provided as lower layer using the fsconfig syscall from new mount api:
|
||||
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir", "/a:lower::dir", 0);
|
||||
|
||||
In the latter case, colons in lower layer directory names will be escaped
|
||||
as an octal characters (\072) when displayed in /proc/self/mountinfo.
|
||||
|
||||
Metadata only copy up
|
||||
---------------------
|
||||
|
@ -949,3 +949,99 @@ mmap_lock held. All in-tree users have been audited and do not seem to
|
||||
depend on the mmap_lock being held, but out of tree users should verify
|
||||
for themselves. If they do need it, they can return VM_FAULT_RETRY to
|
||||
be called with the mmap_lock held.
|
||||
|
||||
---
|
||||
|
||||
**mandatory**
|
||||
|
||||
The order of opening block devices and matching or creating superblocks has
|
||||
changed.
|
||||
|
||||
The old logic opened block devices first and then tried to find a
|
||||
suitable superblock to reuse based on the block device pointer.
|
||||
|
||||
The new logic tries to find a suitable superblock first based on the device
|
||||
number, and opening the block device afterwards.
|
||||
|
||||
Since opening block devices cannot happen under s_umount because of lock
|
||||
ordering requirements s_umount is now dropped while opening block devices and
|
||||
reacquired before calling fill_super().
|
||||
|
||||
In the old logic concurrent mounters would find the superblock on the list of
|
||||
superblocks for the filesystem type. Since the first opener of the block device
|
||||
would hold s_umount they would wait until the superblock became either born or
|
||||
was discarded due to initialization failure.
|
||||
|
||||
Since the new logic drops s_umount concurrent mounters could grab s_umount and
|
||||
would spin. Instead they are now made to wait using an explicit wait-wake
|
||||
mechanism without having to hold s_umount.
|
||||
|
||||
---
|
||||
|
||||
**mandatory**
|
||||
|
||||
The holder of a block device is now the superblock.
|
||||
|
||||
The holder of a block device used to be the file_system_type which wasn't
|
||||
particularly useful. It wasn't possible to go from block device to owning
|
||||
superblock without matching on the device pointer stored in the superblock.
|
||||
This mechanism would only work for a single device so the block layer couldn't
|
||||
find the owning superblock of any additional devices.
|
||||
|
||||
In the old mechanism reusing or creating a superblock for a racing mount(2) and
|
||||
umount(2) relied on the file_system_type as the holder. This was severly
|
||||
underdocumented however:
|
||||
|
||||
(1) Any concurrent mounter that managed to grab an active reference on an
|
||||
existing superblock was made to wait until the superblock either became
|
||||
ready or until the superblock was removed from the list of superblocks of
|
||||
the filesystem type. If the superblock is ready the caller would simple
|
||||
reuse it.
|
||||
|
||||
(2) If the mounter came after deactivate_locked_super() but before
|
||||
the superblock had been removed from the list of superblocks of the
|
||||
filesystem type the mounter would wait until the superblock was shutdown,
|
||||
reuse the block device and allocate a new superblock.
|
||||
|
||||
(3) If the mounter came after deactivate_locked_super() and after
|
||||
the superblock had been removed from the list of superblocks of the
|
||||
filesystem type the mounter would reuse the block device and allocate a new
|
||||
superblock (the bd_holder point may still be set to the filesystem type).
|
||||
|
||||
Because the holder of the block device was the file_system_type any concurrent
|
||||
mounter could open the block devices of any superblock of the same
|
||||
file_system_type without risking seeing EBUSY because the block device was
|
||||
still in use by another superblock.
|
||||
|
||||
Making the superblock the owner of the block device changes this as the holder
|
||||
is now a unique superblock and thus block devices associated with it cannot be
|
||||
reused by concurrent mounters. So a concurrent mounter in (2) could suddenly
|
||||
see EBUSY when trying to open a block device whose holder was a different
|
||||
superblock.
|
||||
|
||||
The new logic thus waits until the superblock and the devices are shutdown in
|
||||
->kill_sb(). Removal of the superblock from the list of superblocks of the
|
||||
filesystem type is now moved to a later point when the devices are closed:
|
||||
|
||||
(1) Any concurrent mounter managing to grab an active reference on an existing
|
||||
superblock is made to wait until the superblock is either ready or until
|
||||
the superblock and all devices are shutdown in ->kill_sb(). If the
|
||||
superblock is ready the caller will simply reuse it.
|
||||
|
||||
(2) If the mounter comes after deactivate_locked_super() but before
|
||||
the superblock has been removed from the list of superblocks of the
|
||||
filesystem type the mounter is made to wait until the superblock and the
|
||||
devices are shut down in ->kill_sb() and the superblock is removed from the
|
||||
list of superblocks of the filesystem type. The mounter will allocate a new
|
||||
superblock and grab ownership of the block device (the bd_holder pointer of
|
||||
the block device will be set to the newly allocated superblock).
|
||||
|
||||
(3) This case is now collapsed into (2) as the superblock is left on the list
|
||||
of superblocks of the filesystem type until all devices are shutdown in
|
||||
->kill_sb(). In other words, if the superblock isn't on the list of
|
||||
superblock of the filesystem type anymore then it has given up ownership of
|
||||
all associated block devices (the bd_holder pointer is NULL).
|
||||
|
||||
As this is a VFS level change it has no practical consequences for filesystems
|
||||
other than that all of them must use one of the provided kill_litter_super(),
|
||||
kill_anon_super(), or kill_block_super() helpers.
|
||||
|
@ -573,6 +573,32 @@ above, leading to:
|
||||
bool "Support for foo hardware"
|
||||
depends on ARCH_FOO_VENDOR || COMPILE_TEST
|
||||
|
||||
Optional dependencies
|
||||
~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Some drivers are able to optionally use a feature from another module
|
||||
or build cleanly with that module disabled, but cause a link failure
|
||||
when trying to use that loadable module from a built-in driver.
|
||||
|
||||
The most common way to express this optional dependency in Kconfig logic
|
||||
uses the slightly counterintuitive::
|
||||
|
||||
config FOO
|
||||
tristate "Support for foo hardware"
|
||||
depends on BAR || !BAR
|
||||
|
||||
This means that there is either a dependency on BAR that disallows
|
||||
the combination of FOO=y with BAR=m, or BAR is completely disabled.
|
||||
For a more formalized approach if there are multiple drivers that have
|
||||
the same dependency, a helper symbol can be used, like::
|
||||
|
||||
config FOO
|
||||
tristate "Support for foo hardware"
|
||||
depends on BAR_OPTIONAL
|
||||
|
||||
config BAR_OPTIONAL
|
||||
def_tristate BAR || !BAR
|
||||
|
||||
Kconfig recursive dependency limitations
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
@ -323,7 +323,7 @@ operations:
|
||||
- dev-name
|
||||
- sb-index
|
||||
reply: &sb-get-reply
|
||||
value: 11
|
||||
value: 13
|
||||
attributes: *sb-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -350,7 +350,7 @@ operations:
|
||||
- sb-index
|
||||
- sb-pool-index
|
||||
reply: &sb-pool-get-reply
|
||||
value: 15
|
||||
value: 17
|
||||
attributes: *sb-pool-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -378,7 +378,7 @@ operations:
|
||||
- sb-index
|
||||
- sb-pool-index
|
||||
reply: &sb-port-pool-get-reply
|
||||
value: 19
|
||||
value: 21
|
||||
attributes: *sb-port-pool-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -407,7 +407,7 @@ operations:
|
||||
- sb-pool-type
|
||||
- sb-tc-index
|
||||
reply: &sb-tc-pool-bind-get-reply
|
||||
value: 23
|
||||
value: 25
|
||||
attributes: *sb-tc-pool-bind-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -538,7 +538,7 @@ operations:
|
||||
- dev-name
|
||||
- trap-name
|
||||
reply: &trap-get-reply
|
||||
value: 61
|
||||
value: 63
|
||||
attributes: *trap-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -564,7 +564,7 @@ operations:
|
||||
- dev-name
|
||||
- trap-group-name
|
||||
reply: &trap-group-get-reply
|
||||
value: 65
|
||||
value: 67
|
||||
attributes: *trap-group-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -590,7 +590,7 @@ operations:
|
||||
- dev-name
|
||||
- trap-policer-id
|
||||
reply: &trap-policer-get-reply
|
||||
value: 69
|
||||
value: 71
|
||||
attributes: *trap-policer-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -617,7 +617,7 @@ operations:
|
||||
- port-index
|
||||
- rate-node-name
|
||||
reply: &rate-get-reply
|
||||
value: 74
|
||||
value: 76
|
||||
attributes: *rate-id-attrs
|
||||
dump:
|
||||
request:
|
||||
@ -643,7 +643,7 @@ operations:
|
||||
- dev-name
|
||||
- linecard-index
|
||||
reply: &linecard-get-reply
|
||||
value: 78
|
||||
value: 80
|
||||
attributes: *linecard-id-attrs
|
||||
dump:
|
||||
request:
|
||||
|
@ -7,9 +7,9 @@ AX.25
|
||||
To use the amateur radio protocols within Linux you will need to get a
|
||||
suitable copy of the AX.25 Utilities. More detailed information about
|
||||
AX.25, NET/ROM and ROSE, associated programs and utilities can be
|
||||
found on http://www.linux-ax25.org.
|
||||
found on https://linux-ax25.in-berlin.de.
|
||||
|
||||
There is an active mailing list for discussing Linux amateur radio matters
|
||||
There is a mailing list for discussing Linux amateur radio matters
|
||||
called linux-hams@vger.kernel.org. To subscribe to it, send a message to
|
||||
majordomo@vger.kernel.org with the words "subscribe linux-hams" in the body
|
||||
of the message, the subject field is ignored. You don't need to be
|
||||
|
@ -162,9 +162,11 @@ How are representors identified?
|
||||
The representor netdevice should *not* directly refer to a PCIe device (e.g.
|
||||
through ``net_dev->dev.parent`` / ``SET_NETDEV_DEV()``), either of the
|
||||
representee or of the switchdev function.
|
||||
Instead, it should implement the ``ndo_get_devlink_port()`` netdevice op, which
|
||||
the kernel uses to provide the ``phys_switch_id`` and ``phys_port_name`` sysfs
|
||||
nodes. (Some legacy drivers implement ``ndo_get_port_parent_id()`` and
|
||||
Instead, the driver should use the ``SET_NETDEV_DEVLINK_PORT`` macro to
|
||||
assign a devlink port instance to the netdevice before registering the
|
||||
netdevice; the kernel uses the devlink port to provide the ``phys_switch_id``
|
||||
and ``phys_port_name`` sysfs nodes.
|
||||
(Some legacy drivers implement ``ndo_get_port_parent_id()`` and
|
||||
``ndo_get_phys_port_name()`` directly, but this is deprecated.) See
|
||||
:ref:`Documentation/networking/devlink/devlink-port.rst <devlink_port>` for the
|
||||
details of this API.
|
||||
|
@ -25,15 +25,15 @@ Contact
|
||||
The Linux kernel hardware security team is separate from the regular Linux
|
||||
kernel security team.
|
||||
|
||||
The team only handles the coordination of embargoed hardware security
|
||||
issues. Reports of pure software security bugs in the Linux kernel are not
|
||||
The team only handles developing fixes for embargoed hardware security
|
||||
issues. Reports of pure software security bugs in the Linux kernel are not
|
||||
handled by this team and the reporter will be guided to contact the regular
|
||||
Linux kernel security team (:ref:`Documentation/admin-guide/
|
||||
<securitybugs>`) instead.
|
||||
|
||||
The team can be contacted by email at <hardware-security@kernel.org>. This
|
||||
is a private list of security officers who will help you to coordinate an
|
||||
issue according to our documented process.
|
||||
is a private list of security officers who will help you to coordinate a
|
||||
fix according to our documented process.
|
||||
|
||||
The list is encrypted and email to the list can be sent by either PGP or
|
||||
S/MIME encrypted and must be signed with the reporter's PGP key or S/MIME
|
||||
@ -132,11 +132,11 @@ other hardware could be affected.
|
||||
|
||||
The hardware security team will provide an incident-specific encrypted
|
||||
mailing-list which will be used for initial discussion with the reporter,
|
||||
further disclosure and coordination.
|
||||
further disclosure, and coordination of fixes.
|
||||
|
||||
The hardware security team will provide the disclosing party a list of
|
||||
developers (domain experts) who should be informed initially about the
|
||||
issue after confirming with the developers that they will adhere to this
|
||||
issue after confirming with the developers that they will adhere to this
|
||||
Memorandum of Understanding and the documented process. These developers
|
||||
form the initial response team and will be responsible for handling the
|
||||
issue after initial contact. The hardware security team is supporting the
|
||||
@ -209,13 +209,18 @@ five work days this is taken as silent acknowledgement.
|
||||
After acknowledgement or resolution of an objection the expert is disclosed
|
||||
by the incident team and brought into the development process.
|
||||
|
||||
List participants may not communicate about the issue outside of the
|
||||
private mailing list. List participants may not use any shared resources
|
||||
(e.g. employer build farms, CI systems, etc) when working on patches.
|
||||
|
||||
|
||||
Coordinated release
|
||||
"""""""""""""""""""
|
||||
|
||||
The involved parties will negotiate the date and time where the embargo
|
||||
ends. At that point the prepared mitigations are integrated into the
|
||||
relevant kernel trees and published.
|
||||
relevant kernel trees and published. There is no pre-notification process:
|
||||
fixes are published in public and available to everyone at the same time.
|
||||
|
||||
While we understand that hardware security issues need coordinated embargo
|
||||
time, the embargo time should be constrained to the minimum time which is
|
||||
@ -251,6 +256,7 @@ an involved disclosed party. The current ambassadors list:
|
||||
IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
Intel Tony Luck <tony.luck@intel.com>
|
||||
Qualcomm Trilok Soni <tsoni@codeaurora.org>
|
||||
RISC-V Palmer Dabbelt <palmer@dabbelt.com>
|
||||
Samsung Javier González <javier.gonz@samsung.com>
|
||||
|
||||
Microsoft James Morris <jamorris@linux.microsoft.com>
|
||||
|
@ -29,7 +29,7 @@ target with the same invocation used for compilation, e.g.::
|
||||
|
||||
To read the docs locally in your web browser, run e.g.::
|
||||
|
||||
xdg-open rust/doc/kernel/index.html
|
||||
xdg-open Documentation/output/rust/rustdoc/kernel/index.html
|
||||
|
||||
To learn about how to write the documentation, please see coding-guidelines.rst.
|
||||
|
||||
|
@ -36,11 +36,11 @@ EXAMPLE
|
||||
In the example below, **rtla timerlat hist** is set to run for *10* minutes,
|
||||
in the cpus *0-4*, *skipping zero* only lines. Moreover, **rtla timerlat
|
||||
hist** will change the priority of the *timerlat* threads to run under
|
||||
*SCHED_DEADLINE* priority, with a *10us* runtime every *1ms* period. The
|
||||
*SCHED_DEADLINE* priority, with a *100us* runtime every *1ms* period. The
|
||||
*1ms* period is also passed to the *timerlat* tracer. Auto-analysis is disabled
|
||||
to reduce overhead ::
|
||||
|
||||
[root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1ms --no-aa
|
||||
[root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1000 --no-aa
|
||||
# RTLA timerlat histogram
|
||||
# Time unit is microseconds (us)
|
||||
# Duration: 0 00:10:00
|
||||
|
@ -91,9 +91,9 @@ The prototype of the entry/exit callback function are as follows:
|
||||
|
||||
.. code-block:: c
|
||||
|
||||
int entry_callback(struct fprobe *fp, unsigned long entry_ip, struct pt_regs *regs, void *entry_data);
|
||||
int entry_callback(struct fprobe *fp, unsigned long entry_ip, unsigned long ret_ip, struct pt_regs *regs, void *entry_data);
|
||||
|
||||
void exit_callback(struct fprobe *fp, unsigned long entry_ip, struct pt_regs *regs, void *entry_data);
|
||||
void exit_callback(struct fprobe *fp, unsigned long entry_ip, unsigned long ret_ip, struct pt_regs *regs, void *entry_data);
|
||||
|
||||
Note that the @entry_ip is saved at function entry and passed to exit handler.
|
||||
If the entry callback function returns !0, the corresponding exit callback will be cancelled.
|
||||
@ -108,6 +108,10 @@ If the entry callback function returns !0, the corresponding exit callback will
|
||||
Note that this may not be the actual entry address of the function but
|
||||
the address where the ftrace is instrumented.
|
||||
|
||||
@ret_ip
|
||||
This is the return address that the traced function will return to,
|
||||
somewhere in the caller. This can be used at both entry and exit.
|
||||
|
||||
@regs
|
||||
This is the `pt_regs` data structure at the entry and exit. Note that
|
||||
the instruction pointer of @regs may be different from the @entry_ip
|
||||
|
@ -344,9 +344,9 @@ LoongArch指令集架构的文档:
|
||||
|
||||
LoongArch的ELF psABI文档:
|
||||
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-CN.pdf (中文版)
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-CN.pdf (中文版)
|
||||
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-EN.pdf (英文版)
|
||||
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-EN.pdf (英文版)
|
||||
|
||||
Loongson与LoongArch的Linux内核源码仓库:
|
||||
|
||||
|
@ -202,7 +202,7 @@ workqueue将自动创建与属性相匹配的后备工作者池。调节并发
|
||||
同的排序属性。
|
||||
|
||||
在目前的实现中,上述配置只保证了特定NUMA节点内的ST行为。相反,
|
||||
``alloc_ordered_queue()`` 应该被用来实现全系统的ST行为。
|
||||
``alloc_ordered_workqueue()`` 应该被用来实现全系统的ST行为。
|
||||
|
||||
|
||||
执行场景示例
|
||||
|
112
MAINTAINERS
112
MAINTAINERS
@ -378,8 +378,9 @@ F: drivers/acpi/viot.c
|
||||
F: include/linux/acpi_viot.h
|
||||
|
||||
ACPI WMI DRIVER
|
||||
M: Armin Wolf <W_Armin@gmx.de>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Orphan
|
||||
S: Maintained
|
||||
F: Documentation/driver-api/wmi.rst
|
||||
F: Documentation/wmi/
|
||||
F: drivers/platform/x86/wmi.c
|
||||
@ -470,7 +471,6 @@ F: drivers/hwmon/adm1029.c
|
||||
ADM8211 WIRELESS DRIVER
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Orphan
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
F: drivers/net/wireless/admtek/adm8211.*
|
||||
|
||||
ADP1653 FLASH CONTROLLER DRIVER
|
||||
@ -1585,6 +1585,17 @@ F: arch/arm/include/asm/arch_timer.h
|
||||
F: arch/arm64/include/asm/arch_timer.h
|
||||
F: drivers/clocksource/arm_arch_timer.c
|
||||
|
||||
ARM GENERIC INTERRUPT CONTROLLER DRIVERS
|
||||
M: Marc Zyngier <maz@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/arm,gic*
|
||||
F: arch/arm/include/asm/arch_gicv3.h
|
||||
F: arch/arm64/include/asm/arch_gicv3.h
|
||||
F: drivers/irqchip/irq-gic*.[ch]
|
||||
F: include/linux/irqchip/arm-gic*.h
|
||||
F: include/linux/irqchip/arm-vgic-info.h
|
||||
|
||||
ARM HDLCD DRM DRIVER
|
||||
M: Liviu Dudau <liviu.dudau@arm.com>
|
||||
S: Supported
|
||||
@ -1662,7 +1673,7 @@ F: arch/arm*/include/asm/perf_event.h
|
||||
F: arch/arm*/kernel/hw_breakpoint.c
|
||||
F: arch/arm*/kernel/perf_*
|
||||
F: drivers/perf/
|
||||
F: include/linux/perf/arm_pmu.h
|
||||
F: include/linux/perf/arm_pmu*.h
|
||||
|
||||
ARM PORT
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
@ -1855,7 +1866,7 @@ F: Documentation/devicetree/bindings/phy/amlogic*
|
||||
F: arch/arm/boot/dts/amlogic/
|
||||
F: arch/arm/mach-meson/
|
||||
F: arch/arm64/boot/dts/amlogic/
|
||||
F: drivers/genpd/amlogic/
|
||||
F: drivers/pmdomain/amlogic/
|
||||
F: drivers/mmc/host/meson*
|
||||
F: drivers/phy/amlogic/
|
||||
F: drivers/pinctrl/meson/
|
||||
@ -1918,7 +1929,7 @@ F: drivers/bluetooth/hci_bcm4377.c
|
||||
F: drivers/clk/clk-apple-nco.c
|
||||
F: drivers/cpufreq/apple-soc-cpufreq.c
|
||||
F: drivers/dma/apple-admac.c
|
||||
F: drivers/genpd/apple/
|
||||
F: drivers/pmdomain/apple/
|
||||
F: drivers/i2c/busses/i2c-pasemi-core.c
|
||||
F: drivers/i2c/busses/i2c-pasemi-platform.c
|
||||
F: drivers/iommu/apple-dart.c
|
||||
@ -1963,12 +1974,12 @@ F: drivers/irqchip/irq-aspeed-i2c-ic.c
|
||||
|
||||
ARM/ASPEED MACHINE SUPPORT
|
||||
M: Joel Stanley <joel@jms.id.au>
|
||||
R: Andrew Jeffery <andrew@aj.id.au>
|
||||
R: Andrew Jeffery <andrew@codeconstruct.com.au>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
Q: https://patchwork.ozlabs.org/project/linux-aspeed/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc.git
|
||||
F: Documentation/devicetree/bindings/arm/aspeed/
|
||||
F: arch/arm/boot/dts/aspeed/
|
||||
F: arch/arm/mach-aspeed/
|
||||
@ -2211,21 +2222,28 @@ F: arch/arm/boot/dts/ti/omap/omap3-igep*
|
||||
ARM/INTEL IXP4XX ARM ARCHITECTURE
|
||||
M: Linus Walleij <linusw@kernel.org>
|
||||
M: Imre Kaloz <kaloz@openwrt.org>
|
||||
M: Krzysztof Halasa <khalasa@piap.pl>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml
|
||||
F: Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml
|
||||
F: Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion*
|
||||
F: Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml
|
||||
F: Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
|
||||
F: arch/arm/boot/dts/intel/ixp/
|
||||
F: arch/arm/mach-ixp4xx/
|
||||
F: drivers/bus/intel-ixp4xx-eb.c
|
||||
F: drivers/char/hw_random/ixp4xx-rng.c
|
||||
F: drivers/clocksource/timer-ixp4xx.c
|
||||
F: drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c
|
||||
F: drivers/gpio/gpio-ixp4xx.c
|
||||
F: drivers/irqchip/irq-ixp4xx.c
|
||||
F: drivers/net/ethernet/xscale/ixp4xx_eth.c
|
||||
F: drivers/net/wan/ixp4xx_hss.c
|
||||
F: drivers/soc/ixp4xx/ixp4xx-npe.c
|
||||
F: drivers/soc/ixp4xx/ixp4xx-qmgr.c
|
||||
F: include/linux/soc/ixp4xx/npe.h
|
||||
F: include/linux/soc/ixp4xx/qmgr.h
|
||||
|
||||
ARM/INTEL KEEMBAY ARCHITECTURE
|
||||
M: Paul J. Murphy <paul.j.murphy@intel.com>
|
||||
@ -2327,7 +2345,7 @@ F: drivers/rtc/rtc-mt7622.c
|
||||
|
||||
ARM/Mediatek SoC support
|
||||
M: Matthias Brugger <matthias.bgg@gmail.com>
|
||||
R: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
M: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
|
||||
@ -2435,7 +2453,7 @@ F: arch/arm/mach-ux500/
|
||||
F: drivers/clk/clk-nomadik.c
|
||||
F: drivers/clocksource/clksrc-dbx500-prcmu.c
|
||||
F: drivers/dma/ste_dma40*
|
||||
F: drivers/genpd/st/ste-ux500-pm-domain.c
|
||||
F: drivers/pmdomain/st/ste-ux500-pm-domain.c
|
||||
F: drivers/hwspinlock/u8500_hsem.c
|
||||
F: drivers/i2c/busses/i2c-nomadik.c
|
||||
F: drivers/iio/adc/ab8500-gpadc.c
|
||||
@ -2598,7 +2616,7 @@ F: arch/arm/include/debug/renesas-scif.S
|
||||
F: arch/arm/mach-shmobile/
|
||||
F: arch/arm64/boot/dts/renesas/
|
||||
F: arch/riscv/boot/dts/renesas/
|
||||
F: drivers/genpd/renesas/
|
||||
F: drivers/pmdomain/renesas/
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
K: \brenesas,
|
||||
@ -3058,7 +3076,7 @@ F: Documentation/devicetree/bindings/peci/peci-aspeed.yaml
|
||||
F: drivers/peci/controller/peci-aspeed.c
|
||||
|
||||
ASPEED PINCTRL DRIVERS
|
||||
M: Andrew Jeffery <andrew@aj.id.au>
|
||||
M: Andrew Jeffery <andrew@codeconstruct.com.au>
|
||||
L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: linux-gpio@vger.kernel.org
|
||||
@ -3075,7 +3093,7 @@ F: drivers/irqchip/irq-aspeed-scu-ic.c
|
||||
F: include/dt-bindings/interrupt-controller/aspeed-scu-ic.h
|
||||
|
||||
ASPEED SD/MMC DRIVER
|
||||
M: Andrew Jeffery <andrew@aj.id.au>
|
||||
M: Andrew Jeffery <andrew@codeconstruct.com.au>
|
||||
L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: linux-mmc@vger.kernel.org
|
||||
@ -3344,7 +3362,7 @@ AX.25 NETWORK LAYER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-hams@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.linux-ax25.org/
|
||||
W: https://linux-ax25.in-berlin.de
|
||||
F: include/net/ax25.h
|
||||
F: include/uapi/linux/ax25.h
|
||||
F: net/ax25/
|
||||
@ -4026,7 +4044,7 @@ F: arch/mips/kernel/*bmips*
|
||||
F: drivers/irqchip/irq-bcm63*
|
||||
F: drivers/irqchip/irq-bcm7*
|
||||
F: drivers/irqchip/irq-brcmstb*
|
||||
F: drivers/genpd/bcm/bcm63xx-power.c
|
||||
F: drivers/pmdomain/bcm/bcm63xx-power.c
|
||||
F: include/linux/bcm963xx_nvram.h
|
||||
F: include/linux/bcm963xx_tag.h
|
||||
|
||||
@ -4082,7 +4100,7 @@ F: drivers/net/wireless/broadcom/brcm80211/
|
||||
|
||||
BROADCOM BRCMSTB GPIO DRIVER
|
||||
M: Doug Berger <opendmb@gmail.com>
|
||||
M: Florian Fainelli <florian.fainelli@broadcom>
|
||||
M: Florian Fainelli <florian.fainelli@broadcom.com>
|
||||
R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml
|
||||
@ -4248,7 +4266,7 @@ R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git https://github.com/broadcom/stblinux.git
|
||||
F: drivers/genpd/bcm/bcm-pmb.c
|
||||
F: drivers/pmdomain/bcm/bcm-pmb.c
|
||||
F: include/dt-bindings/soc/bcm-pmb.h
|
||||
|
||||
BROADCOM SPECIFIC AMBA DRIVER (BCMA)
|
||||
@ -4378,7 +4396,6 @@ M: David Sterba <dsterba@suse.com>
|
||||
L: linux-btrfs@vger.kernel.org
|
||||
S: Maintained
|
||||
W: https://btrfs.readthedocs.io
|
||||
W: https://btrfs.wiki.kernel.org/
|
||||
Q: https://patchwork.kernel.org/project/linux-btrfs/list/
|
||||
C: irc://irc.libera.chat/btrfs
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git
|
||||
@ -5987,8 +6004,8 @@ F: include/linux/devm-helpers.h
|
||||
DEVICE-MAPPER (LVM)
|
||||
M: Alasdair Kergon <agk@redhat.com>
|
||||
M: Mike Snitzer <snitzer@kernel.org>
|
||||
M: dm-devel@redhat.com
|
||||
L: dm-devel@redhat.com
|
||||
M: dm-devel@lists.linux.dev
|
||||
L: dm-devel@lists.linux.dev
|
||||
S: Maintained
|
||||
W: http://sources.redhat.com/dm
|
||||
Q: http://patchwork.kernel.org/project/dm-devel/list/
|
||||
@ -6647,9 +6664,9 @@ F: Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
|
||||
F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c
|
||||
|
||||
DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS
|
||||
M: Ben Skeggs <bskeggs@redhat.com>
|
||||
M: Karol Herbst <kherbst@redhat.com>
|
||||
M: Lyude Paul <lyude@redhat.com>
|
||||
M: Danilo Krummrich <dakr@redhat.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: nouveau@lists.freedesktop.org
|
||||
S: Supported
|
||||
@ -8095,7 +8112,7 @@ F: include/linux/arm_ffa.h
|
||||
|
||||
FIRMWARE LOADER (request_firmware)
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
M: Russ Weight <russell.h.weight@intel.com>
|
||||
M: Russ Weight <russ.weight@linux.dev>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/firmware_class/
|
||||
@ -8730,7 +8747,7 @@ M: Ulf Hansson <ulf.hansson@linaro.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git
|
||||
F: drivers/genpd/
|
||||
F: drivers/pmdomain/
|
||||
|
||||
GENERIC RESISTIVE TOUCHSCREEN ADC DRIVER
|
||||
M: Eugen Hristev <eugen.hristev@microchip.com>
|
||||
@ -8876,7 +8893,7 @@ F: drivers/gpio/gpio-mockup.c
|
||||
F: tools/testing/selftests/gpio/
|
||||
|
||||
GPIO REGMAP
|
||||
R: Michael Walle <michael@walle.cc>
|
||||
M: Michael Walle <michael@walle.cc>
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-regmap.c
|
||||
F: include/linux/gpio/regmap.h
|
||||
@ -9533,10 +9550,8 @@ F: Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml
|
||||
F: drivers/iio/pressure/mprls0025pa.c
|
||||
|
||||
HOST AP DRIVER
|
||||
M: Jouni Malinen <j@w1.fi>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Obsolete
|
||||
W: http://w1.fi/hostap-driver.html
|
||||
F: drivers/net/wireless/intersil/hostap/
|
||||
|
||||
HP BIOSCFG DRIVER
|
||||
@ -10624,22 +10639,6 @@ L: linux-crypto@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c
|
||||
|
||||
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
|
||||
M: Krzysztof Halasa <khalasa@piap.pl>
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/xscale/ixp4xx_eth.c
|
||||
F: drivers/net/wan/ixp4xx_hss.c
|
||||
F: drivers/soc/ixp4xx/ixp4xx-npe.c
|
||||
F: drivers/soc/ixp4xx/ixp4xx-qmgr.c
|
||||
F: include/linux/soc/ixp4xx/npe.h
|
||||
F: include/linux/soc/ixp4xx/qmgr.h
|
||||
|
||||
INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT
|
||||
M: Deepak Saxena <dsaxena@plexity.net>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml
|
||||
F: drivers/char/hw_random/ixp4xx-rng.c
|
||||
|
||||
INTEL KEEM BAY DRM DRIVER
|
||||
M: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
|
||||
M: Edmund Dea <edmund.j.dea@intel.com>
|
||||
@ -11065,7 +11064,7 @@ F: Documentation/devicetree/bindings/sound/irondevice,*
|
||||
F: sound/soc/codecs/sma*
|
||||
|
||||
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
|
||||
M: Marc Zyngier <maz@kernel.org>
|
||||
M: Thomas Gleixner <tglx@linutronix.de>
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
|
||||
F: Documentation/core-api/irq/irq-domain.rst
|
||||
@ -11084,7 +11083,6 @@ F: lib/group_cpus.c
|
||||
|
||||
IRQCHIP DRIVERS
|
||||
M: Thomas Gleixner <tglx@linutronix.de>
|
||||
M: Marc Zyngier <maz@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
|
||||
@ -13618,6 +13616,7 @@ F: drivers/net/ethernet/mellanox/mlxfw/
|
||||
|
||||
MELLANOX HARDWARE PLATFORM SUPPORT
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
|
||||
M: Mark Gross <markgross@kernel.org>
|
||||
M: Vadim Pasternak <vadimp@nvidia.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
@ -14212,6 +14211,7 @@ F: drivers/platform/surface/surface_gpe.c
|
||||
|
||||
MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
|
||||
M: Mark Gross <markgross@kernel.org>
|
||||
M: Maximilian Luz <luzmaximilian@gmail.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
@ -14758,7 +14758,7 @@ NETROM NETWORK LAYER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-hams@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.linux-ax25.org/
|
||||
W: https://linux-ax25.in-berlin.de
|
||||
F: include/net/netrom.h
|
||||
F: include/uapi/linux/netrom.h
|
||||
F: net/netrom/
|
||||
@ -14947,7 +14947,7 @@ K: macsec
|
||||
K: \bmdo_
|
||||
|
||||
NETWORKING [MPTCP]
|
||||
M: Matthieu Baerts <matthieu.baerts@tessares.net>
|
||||
M: Matthieu Baerts <matttbe@kernel.org>
|
||||
M: Mat Martineau <martineau@kernel.org>
|
||||
L: netdev@vger.kernel.org
|
||||
L: mptcp@lists.linux.dev
|
||||
@ -17602,6 +17602,7 @@ M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
L: ath12k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath12k
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
|
||||
F: drivers/net/wireless/ath/ath12k/
|
||||
|
||||
@ -17681,7 +17682,7 @@ L: linux-pm@vger.kernel.org
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml
|
||||
F: drivers/genpd/qcom/cpr.c
|
||||
F: drivers/pmdomain/qcom/cpr.c
|
||||
|
||||
QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096
|
||||
M: Ilia Lin <ilia.lin@kernel.org>
|
||||
@ -18132,8 +18133,6 @@ REALTEK WIRELESS DRIVER (rtlwifi family)
|
||||
M: Ping-Ke Shih <pkshih@realtek.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
|
||||
F: drivers/net/wireless/realtek/rtlwifi/
|
||||
|
||||
REALTEK WIRELESS DRIVER (rtw88)
|
||||
@ -18609,7 +18608,7 @@ ROSE NETWORK LAYER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-hams@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.linux-ax25.org/
|
||||
W: https://linux-ax25.in-berlin.de
|
||||
F: include/net/rose.h
|
||||
F: include/uapi/linux/rose.h
|
||||
F: net/rose/
|
||||
@ -18661,7 +18660,6 @@ F: drivers/media/dvb-frontends/rtl2832_sdr*
|
||||
RTL8180 WIRELESS DRIVER
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Orphan
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
F: drivers/net/wireless/realtek/rtl818x/rtl8180/
|
||||
|
||||
RTL8187 WIRELESS DRIVER
|
||||
@ -18669,14 +18667,12 @@ M: Hin-Tak Leung <hintak.leung@gmail.com>
|
||||
M: Larry Finger <Larry.Finger@lwfinger.net>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
F: drivers/net/wireless/realtek/rtl818x/rtl8187/
|
||||
|
||||
RTL8XXXU WIRELESS DRIVER (rtl8xxxu)
|
||||
M: Jes Sorensen <Jes.Sorensen@gmail.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jes/linux.git rtl8xxxu-devel
|
||||
F: drivers/net/wireless/realtek/rtl8xxxu/
|
||||
|
||||
RTRS TRANSPORT DRIVERS
|
||||
@ -20501,6 +20497,7 @@ F: include/dt-bindings/clock/starfive?jh71*.h
|
||||
STARFIVE JH71X0 PINCTRL DRIVERS
|
||||
M: Emil Renner Berthing <kernel@esmil.dk>
|
||||
M: Jianlong Huang <jianlong.huang@starfivetech.com>
|
||||
M: Hal Feng <hal.feng@starfivetech.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pinctrl/starfive,jh71*.yaml
|
||||
@ -20526,7 +20523,7 @@ STARFIVE JH71XX PMU CONTROLLER DRIVER
|
||||
M: Walker Chen <walker.chen@starfivetech.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/power/starfive*
|
||||
F: drivers/genpd/starfive/jh71xx-pmu.c
|
||||
F: drivers/pmdomain/starfive/jh71xx-pmu.c
|
||||
F: include/dt-bindings/power/starfive,jh7110-pmu.h
|
||||
|
||||
STARFIVE SOC DRIVERS
|
||||
@ -21351,7 +21348,7 @@ F: drivers/irqchip/irq-ti-sci-inta.c
|
||||
F: drivers/irqchip/irq-ti-sci-intr.c
|
||||
F: drivers/reset/reset-ti-sci.c
|
||||
F: drivers/soc/ti/ti_sci_inta_msi.c
|
||||
F: drivers/genpd/ti/ti_sci_pm_domains.c
|
||||
F: drivers/pmdomain/ti/ti_sci_pm_domains.c
|
||||
F: include/dt-bindings/soc/ti,sci_pm_domain.h
|
||||
F: include/linux/soc/ti/ti_sci_inta_msi.h
|
||||
F: include/linux/soc/ti/ti_sci_protocol.h
|
||||
@ -21593,7 +21590,7 @@ L: linux-kernel@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
|
||||
F: drivers/genpd/ti/omap_prm.c
|
||||
F: drivers/pmdomain/ti/omap_prm.c
|
||||
F: drivers/soc/ti/*
|
||||
|
||||
TI LM49xxx FAMILY ASoC CODEC DRIVERS
|
||||
@ -21669,7 +21666,6 @@ L: linux-wireless@vger.kernel.org
|
||||
S: Orphan
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/wl12xx
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/wl1251
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git
|
||||
F: drivers/net/wireless/ti/
|
||||
|
||||
TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER
|
||||
@ -23436,9 +23432,11 @@ F: drivers/platform/x86/x86-android-tablets/
|
||||
|
||||
X86 PLATFORM DRIVERS
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
|
||||
M: Mark Gross <markgross@kernel.org>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
Q: https://patchwork.kernel.org/project/platform-driver-x86/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git
|
||||
F: drivers/platform/olpc/
|
||||
F: drivers/platform/x86/
|
||||
|
4
Makefile
4
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -1474,7 +1474,7 @@ endif # CONFIG_MODULES
|
||||
# Directories & files removed with 'make clean'
|
||||
CLEAN_FILES += vmlinux.symvers modules-only.symvers \
|
||||
modules.builtin modules.builtin.modinfo modules.nsdeps \
|
||||
compile_commands.json .thinlto-cache rust/test rust/doc \
|
||||
compile_commands.json .thinlto-cache rust/test \
|
||||
rust-project.json .vmlinux.objs .vmlinux.export.c
|
||||
|
||||
# Directories & files removed with 'make mrproper'
|
||||
|
@ -614,12 +614,12 @@
|
||||
/* Configure pwm clock source for timers 8 & 9 */
|
||||
&timer8 {
|
||||
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&sys_clkin_ck>;
|
||||
assigned-clock-parents = <&sys_32k_ck>;
|
||||
};
|
||||
|
||||
&timer9 {
|
||||
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&sys_clkin_ck>;
|
||||
assigned-clock-parents = <&sys_32k_ck>;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -640,6 +640,7 @@
|
||||
&uart3 {
|
||||
interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
|
||||
&omap4_pmx_core 0x17c>;
|
||||
overrun-throttle-ms = <500>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
|
@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal {
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
coefficients = <0 20000>;
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&bandgap 0>;
|
||||
thermal-sensors = <&bandgap>;
|
||||
|
||||
cpu_trips: trips {
|
||||
cpu_alert0: cpu_alert {
|
||||
|
@ -12,7 +12,10 @@ cpu_thermal: cpu_thermal {
|
||||
polling-delay-passive = <250>; /* milliseconds */
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
/*
|
||||
* See 44xx files for single sensor addressing, omap5 and dra7 need
|
||||
* also sensor ID for addressing.
|
||||
*/
|
||||
thermal-sensors = <&bandgap 0>;
|
||||
|
||||
cpu_trips: trips {
|
||||
|
@ -69,6 +69,7 @@
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
thermal-sensors = <&bandgap>;
|
||||
coefficients = <0 20000>;
|
||||
};
|
||||
|
||||
|
@ -79,6 +79,7 @@
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
thermal-sensors = <&bandgap>;
|
||||
coefficients = <348 (-9301)>;
|
||||
};
|
||||
|
||||
|
@ -195,7 +195,7 @@ struct locomo_driver {
|
||||
|
||||
#define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name)
|
||||
|
||||
void locomo_lcd_power(struct locomo_dev *, int, unsigned int);
|
||||
extern void locomolcd_power(int on);
|
||||
|
||||
int locomo_driver_register(struct locomo_driver *);
|
||||
void locomo_driver_unregister(struct locomo_driver *);
|
||||
|
@ -99,7 +99,7 @@ static int omap4_pm_suspend(void)
|
||||
* possible causes.
|
||||
* http://www.spinics.net/lists/arm-kernel/msg218641.html
|
||||
*/
|
||||
pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
|
||||
pr_debug("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
|
||||
} else {
|
||||
pr_info("Successfully put all powerdomains to target state\n");
|
||||
}
|
||||
@ -257,7 +257,7 @@ int __init omap4_pm_init(void)
|
||||
* http://www.spinics.net/lists/arm-kernel/msg218641.html
|
||||
*/
|
||||
if (cpu_is_omap44xx())
|
||||
pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
|
||||
pr_debug("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
|
||||
|
||||
ret = pwrdm_for_each(pwrdms_setup, NULL);
|
||||
if (ret) {
|
||||
|
@ -16,8 +16,6 @@
|
||||
|
||||
#include "hardware.h" /* Gives GPIO_MAX */
|
||||
|
||||
extern void locomolcd_power(int on);
|
||||
|
||||
#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
|
||||
#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)
|
||||
#define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12
|
||||
|
@ -58,11 +58,13 @@
|
||||
((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
|
||||
|
||||
/**
|
||||
* uniphier_cache_data - UniPhier outer cache specific data
|
||||
* struct uniphier_cache_data - UniPhier outer cache specific data
|
||||
*
|
||||
* @ctrl_base: virtual base address of control registers
|
||||
* @rev_base: virtual base address of revision registers
|
||||
* @op_base: virtual base address of operation registers
|
||||
* @way_ctrl_base: virtual address of the way control registers for this
|
||||
* SoC revision
|
||||
* @way_mask: each bit specifies if the way is present
|
||||
* @nsets: number of associativity sets
|
||||
* @line_size: line size in bytes
|
||||
|
@ -207,7 +207,7 @@ static void xen_power_off(void)
|
||||
|
||||
static irqreturn_t xen_arm_callback(int irq, void *arg)
|
||||
{
|
||||
xen_hvm_evtchn_do_upcall();
|
||||
xen_evtchn_do_upcall();
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
@ -1037,6 +1037,19 @@ config ARM64_ERRATUM_2645198
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config ARM64_ERRATUM_2966298
|
||||
bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
|
||||
default y
|
||||
help
|
||||
This option adds the workaround for ARM Cortex-A520 erratum 2966298.
|
||||
|
||||
On an affected Cortex-A520 core, a speculatively executed unprivileged
|
||||
load might leak data from a privileged level via a cache side channel.
|
||||
|
||||
Work around this problem by executing a TLBI before returning to EL0.
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config CAVIUM_ERRATUM_22375
|
||||
bool "Cavium erratum 22375, 24313"
|
||||
default y
|
||||
|
@ -66,6 +66,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
|
||||
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
|
||||
|
@ -26,7 +26,7 @@
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&adv7533_out>;
|
||||
remote-endpoint = <&adv7535_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -72,6 +72,13 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_vddext_3v3: regulator-vddext-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDDEXT_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm1 0 5000000 0>;
|
||||
@ -317,15 +324,16 @@
|
||||
|
||||
hdmi@3d {
|
||||
compatible = "adi,adv7535";
|
||||
reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
|
||||
reg-names = "main", "cec", "edid", "packet";
|
||||
reg = <0x3d>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
|
||||
adi,dsi-lanes = <4>;
|
||||
|
||||
adi,input-depth = <8>;
|
||||
adi,input-colorspace = "rgb";
|
||||
adi,input-clock = "1x";
|
||||
adi,input-style = <1>;
|
||||
adi,input-justification = "evenly";
|
||||
avdd-supply = <&buck5_reg>;
|
||||
dvdd-supply = <&buck5_reg>;
|
||||
pvdd-supply = <&buck5_reg>;
|
||||
a2vdd-supply = <&buck5_reg>;
|
||||
v3p3-supply = <®_vddext_3v3>;
|
||||
v1p2-supply = <&buck5_reg>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
@ -334,7 +342,7 @@
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
adv7533_in: endpoint {
|
||||
adv7535_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
@ -342,7 +350,7 @@
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
adv7533_out: endpoint {
|
||||
adv7535_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
@ -448,7 +456,7 @@
|
||||
reg = <1>;
|
||||
|
||||
dsi_out: endpoint {
|
||||
remote-endpoint = <&adv7533_in>;
|
||||
remote-endpoint = <&adv7535_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
@ -381,9 +381,10 @@
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
|
||||
<&clk IMX8MP_AUDIO_PLL2> ;
|
||||
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
assigned-clock-rates = <12288000>, <361267200>;
|
||||
fsl,sai-mclk-direction-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -790,6 +790,12 @@
|
||||
reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
|
||||
clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
|
||||
<&clk IMX8MP_CLK_AUDIO_AXI>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
|
||||
<&clk IMX8MP_CLK_AUDIO_AXI_SRC>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
|
||||
<&clk IMX8MP_SYS_PLL1_800M>;
|
||||
assigned-clock-rates = <400000000>,
|
||||
<600000000>;
|
||||
};
|
||||
|
||||
pgc_gpu2d: power-domain@6 {
|
||||
|
@ -81,7 +81,7 @@
|
||||
&gpio1 {
|
||||
pmic-irq-hog {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_LOW>;
|
||||
gpios = <3 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "PMIC_IRQ#";
|
||||
};
|
||||
|
@ -185,7 +185,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
anomix_ns_gpr: syscon@44210000 {
|
||||
aonmix_ns_gpr: syscon@44210000 {
|
||||
compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
|
||||
reg = <0x44210000 0x1000>;
|
||||
};
|
||||
@ -319,6 +319,7 @@
|
||||
assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
fsl,clk-source = /bits/ 8 <0>;
|
||||
fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -591,6 +592,7 @@
|
||||
assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
fsl,clk-source = /bits/ 8 <0>;
|
||||
fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -905,7 +905,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata_phy: t-phy@1a243000 {
|
||||
sata_phy: t-phy {
|
||||
compatible = "mediatek,mt7622-tphy",
|
||||
"mediatek,generic-tphy-v1";
|
||||
#address-cells = <2>;
|
||||
|
@ -434,7 +434,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie_phy: t-phy@11c00000 {
|
||||
pcie_phy: t-phy {
|
||||
compatible = "mediatek,mt7986-tphy",
|
||||
"mediatek,generic-tphy-v2";
|
||||
#address-cells = <2>;
|
||||
|
@ -48,7 +48,7 @@
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x40000000 0 0x80000000>;
|
||||
reg = <0 0x40000000 0x2 0x00000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
@ -56,13 +56,8 @@
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
|
||||
bl31_secmon_reserved: secmon@54600000 {
|
||||
no-map;
|
||||
reg = <0 0x54600000 0x0 0x200000>;
|
||||
};
|
||||
|
||||
/* 12 MiB reserved for OP-TEE (BL32)
|
||||
/*
|
||||
* 12 MiB reserved for OP-TEE (BL32)
|
||||
* +-----------------------+ 0x43e0_0000
|
||||
* | SHMEM 2MiB |
|
||||
* +-----------------------+ 0x43c0_0000
|
||||
@ -75,6 +70,34 @@
|
||||
no-map;
|
||||
reg = <0 0x43200000 0 0x00c00000>;
|
||||
};
|
||||
|
||||
scp_mem: memory@50000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x50000000 0 0x2900000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vpu_mem: memory@53000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x53000000 0 0x1400000>; /* 20 MB */
|
||||
};
|
||||
|
||||
/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
|
||||
bl31_secmon_mem: memory@54600000 {
|
||||
no-map;
|
||||
reg = <0 0x54600000 0x0 0x200000>;
|
||||
};
|
||||
|
||||
snd_dma_mem: memory@60000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x60000000 0 0x1100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
apu_mem: memory@62000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0x62000000 0 0x1400000>; /* 20 MB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -313,6 +313,7 @@
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
|
||||
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
|
||||
status = "fail";
|
||||
};
|
||||
|
||||
dmic_codec: dmic-codec {
|
||||
@ -2957,7 +2958,7 @@
|
||||
clock-names = "merge","merge_async";
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
|
||||
mediatek,merge-mute = <1>;
|
||||
mediatek,merge-mute;
|
||||
resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>;
|
||||
};
|
||||
|
||||
@ -2970,7 +2971,7 @@
|
||||
clock-names = "merge","merge_async";
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
|
||||
mediatek,merge-mute = <1>;
|
||||
mediatek,merge-mute;
|
||||
resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>;
|
||||
};
|
||||
|
||||
@ -2983,7 +2984,7 @@
|
||||
clock-names = "merge","merge_async";
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
|
||||
mediatek,merge-mute = <1>;
|
||||
mediatek,merge-mute;
|
||||
resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>;
|
||||
};
|
||||
|
||||
@ -2996,7 +2997,7 @@
|
||||
clock-names = "merge","merge_async";
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
|
||||
mediatek,merge-mute = <1>;
|
||||
mediatek,merge-mute;
|
||||
resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>;
|
||||
};
|
||||
|
||||
@ -3009,7 +3010,7 @@
|
||||
clock-names = "merge","merge_async";
|
||||
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
|
||||
mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
|
||||
mediatek,merge-fifo-en = <1>;
|
||||
mediatek,merge-fifo-en;
|
||||
resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>;
|
||||
};
|
||||
|
||||
|
@ -3958,7 +3958,7 @@
|
||||
|
||||
pdc: interrupt-controller@b220000 {
|
||||
compatible = "qcom,sm8150-pdc", "qcom,pdc";
|
||||
reg = <0 0x0b220000 0 0x400>;
|
||||
reg = <0 0x0b220000 0 0x30000>;
|
||||
qcom,pdc-ranges = <0 480 94>, <94 609 31>,
|
||||
<125 63 1>;
|
||||
#interrupt-cells = <2>;
|
||||
|
@ -636,6 +636,7 @@ CONFIG_POWER_RESET_MSM=y
|
||||
CONFIG_POWER_RESET_QCOM_PON=m
|
||||
CONFIG_POWER_RESET_XGENE=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
|
||||
CONFIG_SYSCON_REBOOT_MODE=y
|
||||
CONFIG_NVMEM_REBOOT_MODE=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
@ -1175,7 +1176,6 @@ CONFIG_COMMON_CLK_S2MPS11=y
|
||||
CONFIG_COMMON_CLK_PWM=y
|
||||
CONFIG_COMMON_CLK_RS9_PCIE=y
|
||||
CONFIG_COMMON_CLK_VC5=y
|
||||
CONFIG_COMMON_CLK_NPCM8XX=y
|
||||
CONFIG_COMMON_CLK_BD718XX=m
|
||||
CONFIG_CLK_RASPBERRYPI=m
|
||||
CONFIG_CLK_IMX8MM=y
|
||||
|
@ -9,6 +9,7 @@
|
||||
#ifndef _ASM_ACPI_H
|
||||
#define _ASM_ACPI_H
|
||||
|
||||
#include <linux/cpuidle.h>
|
||||
#include <linux/efi.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/psci.h>
|
||||
@ -44,6 +45,24 @@
|
||||
|
||||
#define ACPI_MADT_GICC_TRBE (offsetof(struct acpi_madt_generic_interrupt, \
|
||||
trbe_interrupt) + sizeof(u16))
|
||||
/*
|
||||
* Arm® Functional Fixed Hardware Specification Version 1.2.
|
||||
* Table 2: Arm Architecture context loss flags
|
||||
*/
|
||||
#define CPUIDLE_CORE_CTXT BIT(0) /* Core context Lost */
|
||||
|
||||
static inline unsigned int arch_get_idle_state_flags(u32 arch_flags)
|
||||
{
|
||||
if (arch_flags & CPUIDLE_CORE_CTXT)
|
||||
return CPUIDLE_FLAG_TIMER_STOP;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#define arch_get_idle_state_flags arch_get_idle_state_flags
|
||||
|
||||
#define CPUIDLE_TRACE_CTXT BIT(1) /* Trace context loss */
|
||||
#define CPUIDLE_GICR_CTXT BIT(2) /* GICR */
|
||||
#define CPUIDLE_GICD_CTXT BIT(3) /* GICD */
|
||||
|
||||
/* Basic configuration for ACPI */
|
||||
#ifdef CONFIG_ACPI
|
||||
|
@ -663,7 +663,7 @@ static inline bool supports_clearbhb(int scope)
|
||||
isar2 = read_sanitised_ftr_reg(SYS_ID_AA64ISAR2_EL1);
|
||||
|
||||
return cpuid_feature_extract_unsigned_field(isar2,
|
||||
ID_AA64ISAR2_EL1_BC_SHIFT);
|
||||
ID_AA64ISAR2_EL1_CLRBHB_SHIFT);
|
||||
}
|
||||
|
||||
const struct cpumask *system_32bit_el0_cpumask(void);
|
||||
|
@ -79,6 +79,7 @@
|
||||
#define ARM_CPU_PART_CORTEX_A78AE 0xD42
|
||||
#define ARM_CPU_PART_CORTEX_X1 0xD44
|
||||
#define ARM_CPU_PART_CORTEX_A510 0xD46
|
||||
#define ARM_CPU_PART_CORTEX_A520 0xD80
|
||||
#define ARM_CPU_PART_CORTEX_A710 0xD47
|
||||
#define ARM_CPU_PART_CORTEX_A715 0xD4D
|
||||
#define ARM_CPU_PART_CORTEX_X2 0xD48
|
||||
@ -148,6 +149,7 @@
|
||||
#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
|
||||
#define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
|
||||
#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
|
||||
#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)
|
||||
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
|
||||
#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)
|
||||
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
|
||||
|
@ -28,7 +28,7 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags);
|
||||
#define arch_make_huge_pte arch_make_huge_pte
|
||||
#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
|
||||
extern void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pte);
|
||||
pte_t *ptep, pte_t pte, unsigned long sz);
|
||||
#define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS
|
||||
extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,
|
||||
unsigned long addr, pte_t *ptep,
|
||||
|
@ -344,14 +344,14 @@
|
||||
*/
|
||||
#define __HFGRTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51))
|
||||
#define __HFGRTR_EL2_MASK GENMASK(49, 0)
|
||||
#define __HFGRTR_EL2_nMASK (GENMASK(55, 54) | BIT(50))
|
||||
#define __HFGRTR_EL2_nMASK (GENMASK(58, 57) | GENMASK(55, 54) | BIT(50))
|
||||
|
||||
#define __HFGWTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51) | \
|
||||
BIT(46) | BIT(42) | BIT(40) | BIT(28) | \
|
||||
GENMASK(26, 25) | BIT(21) | BIT(18) | \
|
||||
GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))
|
||||
#define __HFGWTR_EL2_MASK GENMASK(49, 0)
|
||||
#define __HFGWTR_EL2_nMASK (GENMASK(55, 54) | BIT(50))
|
||||
#define __HFGWTR_EL2_nMASK (GENMASK(58, 57) | GENMASK(55, 54) | BIT(50))
|
||||
|
||||
#define __HFGITR_EL2_RES0 GENMASK(63, 57)
|
||||
#define __HFGITR_EL2_MASK GENMASK(54, 0)
|
||||
|
@ -118,7 +118,7 @@ void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu);
|
||||
|
||||
u64 __guest_enter(struct kvm_vcpu *vcpu);
|
||||
|
||||
bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt);
|
||||
bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
|
||||
|
||||
#ifdef __KVM_NVHE_HYPERVISOR__
|
||||
void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
|
||||
|
@ -730,6 +730,14 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
.cpu_enable = cpu_clear_bf16_from_user_emulation,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_2966298
|
||||
{
|
||||
.desc = "ARM erratum 2966298",
|
||||
.capability = ARM64_WORKAROUND_2966298,
|
||||
/* Cortex-A520 r0p0 - r0p1 */
|
||||
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38
|
||||
{
|
||||
.desc = "AmpereOne erratum AC03_CPU_38",
|
||||
|
@ -222,7 +222,8 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
|
||||
static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
|
||||
ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_CSSC_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_RPRFM_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_CLRBHB_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_MOPS_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
|
||||
FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_EL1_APA3_SHIFT, 4, 0),
|
||||
|
@ -428,6 +428,10 @@ alternative_else_nop_endif
|
||||
ldp x28, x29, [sp, #16 * 14]
|
||||
|
||||
.if \el == 0
|
||||
alternative_if ARM64_WORKAROUND_2966298
|
||||
tlbi vale1, xzr
|
||||
dsb nsh
|
||||
alternative_else_nop_endif
|
||||
alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0
|
||||
ldr lr, [sp, #S_LR]
|
||||
add sp, sp, #PT_REGS_SIZE // restore sp
|
||||
|
@ -55,11 +55,6 @@ static struct irq_ops arch_timer_irq_ops = {
|
||||
.get_input_level = kvm_arch_timer_get_input_level,
|
||||
};
|
||||
|
||||
static bool has_cntpoff(void)
|
||||
{
|
||||
return (has_vhe() && cpus_have_final_cap(ARM64_HAS_ECV_CNTPOFF));
|
||||
}
|
||||
|
||||
static int nr_timers(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (!vcpu_has_nv(vcpu))
|
||||
@ -180,7 +175,7 @@ u64 kvm_phys_timer_read(void)
|
||||
return timecounter->cc->read(timecounter->cc);
|
||||
}
|
||||
|
||||
static void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map)
|
||||
void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map)
|
||||
{
|
||||
if (vcpu_has_nv(vcpu)) {
|
||||
if (is_hyp_ctxt(vcpu)) {
|
||||
@ -548,8 +543,7 @@ static void timer_save_state(struct arch_timer_context *ctx)
|
||||
timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTP_CTL));
|
||||
cval = read_sysreg_el0(SYS_CNTP_CVAL);
|
||||
|
||||
if (!has_cntpoff())
|
||||
cval -= timer_get_offset(ctx);
|
||||
cval -= timer_get_offset(ctx);
|
||||
|
||||
timer_set_cval(ctx, cval);
|
||||
|
||||
@ -636,8 +630,7 @@ static void timer_restore_state(struct arch_timer_context *ctx)
|
||||
cval = timer_get_cval(ctx);
|
||||
offset = timer_get_offset(ctx);
|
||||
set_cntpoff(offset);
|
||||
if (!has_cntpoff())
|
||||
cval += offset;
|
||||
cval += offset;
|
||||
write_sysreg_el0(cval, SYS_CNTP_CVAL);
|
||||
isb();
|
||||
write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTP_CTL);
|
||||
|
@ -977,6 +977,8 @@ enum fg_filter_id {
|
||||
|
||||
static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {
|
||||
/* HFGRTR_EL2, HFGWTR_EL2 */
|
||||
SR_FGT(SYS_PIR_EL1, HFGxTR, nPIR_EL1, 0),
|
||||
SR_FGT(SYS_PIRE0_EL1, HFGxTR, nPIRE0_EL1, 0),
|
||||
SR_FGT(SYS_TPIDR2_EL0, HFGxTR, nTPIDR2_EL0, 0),
|
||||
SR_FGT(SYS_SMPRI_EL1, HFGxTR, nSMPRI_EL1, 0),
|
||||
SR_FGT(SYS_ACCDATA_EL1, HFGxTR, nACCDATA_EL1, 0),
|
||||
|
@ -12,6 +12,6 @@
|
||||
#define FFA_MAX_FUNC_NUM 0x7F
|
||||
|
||||
int hyp_ffa_init(void *pages);
|
||||
bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt);
|
||||
bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
|
||||
|
||||
#endif /* __KVM_HYP_FFA_H */
|
||||
|
@ -634,9 +634,8 @@ out_handled:
|
||||
return true;
|
||||
}
|
||||
|
||||
bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt)
|
||||
bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)
|
||||
{
|
||||
DECLARE_REG(u64, func_id, host_ctxt, 0);
|
||||
struct arm_smccc_res res;
|
||||
|
||||
/*
|
||||
|
@ -57,6 +57,7 @@ __do_hyp_init:
|
||||
cmp x0, #HVC_STUB_HCALL_NR
|
||||
b.lo __kvm_handle_stub_hvc
|
||||
|
||||
bic x0, x0, #ARM_SMCCC_CALL_HINTS
|
||||
mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)
|
||||
cmp x0, x3
|
||||
b.eq 1f
|
||||
|
@ -368,6 +368,7 @@ static void handle_host_hcall(struct kvm_cpu_context *host_ctxt)
|
||||
if (static_branch_unlikely(&kvm_protected_mode_initialized))
|
||||
hcall_min = __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize;
|
||||
|
||||
id &= ~ARM_SMCCC_CALL_HINTS;
|
||||
id -= KVM_HOST_SMCCC_ID(0);
|
||||
|
||||
if (unlikely(id < hcall_min || id >= ARRAY_SIZE(host_hcall)))
|
||||
@ -392,11 +393,14 @@ static void default_host_smc_handler(struct kvm_cpu_context *host_ctxt)
|
||||
|
||||
static void handle_host_smc(struct kvm_cpu_context *host_ctxt)
|
||||
{
|
||||
DECLARE_REG(u64, func_id, host_ctxt, 0);
|
||||
bool handled;
|
||||
|
||||
handled = kvm_host_psci_handler(host_ctxt);
|
||||
func_id &= ~ARM_SMCCC_CALL_HINTS;
|
||||
|
||||
handled = kvm_host_psci_handler(host_ctxt, func_id);
|
||||
if (!handled)
|
||||
handled = kvm_host_ffa_handler(host_ctxt);
|
||||
handled = kvm_host_ffa_handler(host_ctxt, func_id);
|
||||
if (!handled)
|
||||
default_host_smc_handler(host_ctxt);
|
||||
|
||||
|
@ -273,9 +273,8 @@ static unsigned long psci_1_0_handler(u64 func_id, struct kvm_cpu_context *host_
|
||||
}
|
||||
}
|
||||
|
||||
bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt)
|
||||
bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)
|
||||
{
|
||||
DECLARE_REG(u64, func_id, host_ctxt, 0);
|
||||
unsigned long ret;
|
||||
|
||||
switch (kvm_host_psci_config.version) {
|
||||
|
@ -39,6 +39,26 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
|
||||
|
||||
___activate_traps(vcpu);
|
||||
|
||||
if (has_cntpoff()) {
|
||||
struct timer_map map;
|
||||
|
||||
get_timer_map(vcpu, &map);
|
||||
|
||||
/*
|
||||
* We're entrering the guest. Reload the correct
|
||||
* values from memory now that TGE is clear.
|
||||
*/
|
||||
if (map.direct_ptimer == vcpu_ptimer(vcpu))
|
||||
val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);
|
||||
if (map.direct_ptimer == vcpu_hptimer(vcpu))
|
||||
val = __vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2);
|
||||
|
||||
if (map.direct_ptimer) {
|
||||
write_sysreg_el0(val, SYS_CNTP_CVAL);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
val = read_sysreg(cpacr_el1);
|
||||
val |= CPACR_ELx_TTA;
|
||||
val &= ~(CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN |
|
||||
@ -77,6 +97,30 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
|
||||
|
||||
write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
|
||||
|
||||
if (has_cntpoff()) {
|
||||
struct timer_map map;
|
||||
u64 val, offset;
|
||||
|
||||
get_timer_map(vcpu, &map);
|
||||
|
||||
/*
|
||||
* We're exiting the guest. Save the latest CVAL value
|
||||
* to memory and apply the offset now that TGE is set.
|
||||
*/
|
||||
val = read_sysreg_el0(SYS_CNTP_CVAL);
|
||||
if (map.direct_ptimer == vcpu_ptimer(vcpu))
|
||||
__vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = val;
|
||||
if (map.direct_ptimer == vcpu_hptimer(vcpu))
|
||||
__vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2) = val;
|
||||
|
||||
offset = read_sysreg_s(SYS_CNTPOFF_EL2);
|
||||
|
||||
if (map.direct_ptimer && offset) {
|
||||
write_sysreg_el0(val + offset, SYS_CNTP_CVAL);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* ARM errata 1165522 and 1530923 require the actual execution of the
|
||||
* above before we can switch to the EL2/EL0 translation regime used by
|
||||
|
@ -652,6 +652,9 @@ int hyp_alloc_private_va_range(size_t size, unsigned long *haddr)
|
||||
|
||||
mutex_unlock(&kvm_hyp_pgd_mutex);
|
||||
|
||||
if (!ret)
|
||||
*haddr = base;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -39,7 +39,7 @@ void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr)
|
||||
{
|
||||
struct kvm_pmu_events *pmu = kvm_get_pmu_events();
|
||||
|
||||
if (!kvm_arm_support_pmu_v3() || !pmu || !kvm_pmu_switch_needed(attr))
|
||||
if (!kvm_arm_support_pmu_v3() || !kvm_pmu_switch_needed(attr))
|
||||
return;
|
||||
|
||||
if (!attr->exclude_host)
|
||||
@ -55,7 +55,7 @@ void kvm_clr_pmu_events(u32 clr)
|
||||
{
|
||||
struct kvm_pmu_events *pmu = kvm_get_pmu_events();
|
||||
|
||||
if (!kvm_arm_support_pmu_v3() || !pmu)
|
||||
if (!kvm_arm_support_pmu_v3())
|
||||
return;
|
||||
|
||||
pmu->events_host &= ~clr;
|
||||
|
@ -2122,8 +2122,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
|
||||
{ SYS_DESC(SYS_PMMIR_EL1), trap_raz_wi },
|
||||
|
||||
{ SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },
|
||||
{ SYS_DESC(SYS_PIRE0_EL1), access_vm_reg, reset_unknown, PIRE0_EL1 },
|
||||
{ SYS_DESC(SYS_PIR_EL1), access_vm_reg, reset_unknown, PIR_EL1 },
|
||||
{ SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1 },
|
||||
{ SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1 },
|
||||
{ SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 },
|
||||
|
||||
{ SYS_DESC(SYS_LORSA_EL1), trap_loregion },
|
||||
|
@ -241,15 +241,8 @@ static void clear_flush(struct mm_struct *mm,
|
||||
flush_tlb_range(&vma, saddr, addr);
|
||||
}
|
||||
|
||||
static inline struct folio *hugetlb_swap_entry_to_folio(swp_entry_t entry)
|
||||
{
|
||||
VM_BUG_ON(!is_migration_entry(entry) && !is_hwpoison_entry(entry));
|
||||
|
||||
return page_folio(pfn_to_page(swp_offset_pfn(entry)));
|
||||
}
|
||||
|
||||
void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pte)
|
||||
pte_t *ptep, pte_t pte, unsigned long sz)
|
||||
{
|
||||
size_t pgsize;
|
||||
int i;
|
||||
@ -257,13 +250,10 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
unsigned long pfn, dpfn;
|
||||
pgprot_t hugeprot;
|
||||
|
||||
ncontig = num_contig_ptes(sz, &pgsize);
|
||||
|
||||
if (!pte_present(pte)) {
|
||||
struct folio *folio;
|
||||
|
||||
folio = hugetlb_swap_entry_to_folio(pte_to_swp_entry(pte));
|
||||
ncontig = num_contig_ptes(folio_size(folio), &pgsize);
|
||||
|
||||
for (i = 0; i < ncontig; i++, ptep++)
|
||||
for (i = 0; i < ncontig; i++, ptep++, addr += pgsize)
|
||||
set_pte_at(mm, addr, ptep, pte);
|
||||
return;
|
||||
}
|
||||
@ -273,7 +263,6 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
return;
|
||||
}
|
||||
|
||||
ncontig = find_num_contig(mm, addr, ptep, &pgsize);
|
||||
pfn = pte_pfn(pte);
|
||||
dpfn = pgsize >> PAGE_SHIFT;
|
||||
hugeprot = pte_pgprot(pte);
|
||||
@ -571,5 +560,7 @@ pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr
|
||||
void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep,
|
||||
pte_t old_pte, pte_t pte)
|
||||
{
|
||||
set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
|
||||
unsigned long psize = huge_page_size(hstate_vma(vma));
|
||||
|
||||
set_huge_pte_at(vma->vm_mm, addr, ptep, pte, psize);
|
||||
}
|
||||
|
@ -84,6 +84,7 @@ WORKAROUND_2077057
|
||||
WORKAROUND_2457168
|
||||
WORKAROUND_2645198
|
||||
WORKAROUND_2658417
|
||||
WORKAROUND_2966298
|
||||
WORKAROUND_AMPERE_AC03_CPU_38
|
||||
WORKAROUND_TRBE_OVERWRITE_FILL_MODE
|
||||
WORKAROUND_TSB_FLUSH_FAILURE
|
||||
|
@ -1347,7 +1347,11 @@ UnsignedEnum 51:48 RPRFM
|
||||
0b0000 NI
|
||||
0b0001 IMP
|
||||
EndEnum
|
||||
Res0 47:28
|
||||
Res0 47:32
|
||||
UnsignedEnum 31:28 CLRBHB
|
||||
0b0000 NI
|
||||
0b0001 IMP
|
||||
EndEnum
|
||||
UnsignedEnum 27:24 PAC_frac
|
||||
0b0000 NI
|
||||
0b0001 IMP
|
||||
|
@ -15,9 +15,4 @@ DECLARE_PER_CPU(struct ia64_cpu, cpu_devices);
|
||||
|
||||
DECLARE_PER_CPU(int, cpu_state);
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
extern int arch_register_cpu(int num);
|
||||
extern void arch_unregister_cpu(int);
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_IA64_CPU_H_ */
|
||||
|
@ -907,3 +907,7 @@ EXPORT_SYMBOL(acpi_unregister_ioapic);
|
||||
* TBD when IA64 starts to support suspend...
|
||||
*/
|
||||
int acpi_suspend_lowlevel(void) { return 0; }
|
||||
|
||||
void acpi_proc_quirk_mwait_check(void)
|
||||
{
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user