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ARM: dts: tegra20/tegra30: add pmu interrupt-affinity

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This is similar to tegra124 and avoids the following being reported
upon boot:

hw perfevents: no interrupt-affinity property for /pmu, guessing.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2018-08-16 10:06:04 +02:00 committed by Thierry Reding
parent 8188391c12
commit 2db12b16e5
2 changed files with 6 additions and 0 deletions
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2
arch/arm/boot/dts/tegra20.dtsi
View File

@ -865,5 +865,7 @@
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&{/cpus/cpu@0}>,
<&{/cpus/cpu@1}>;
}; };
}; };

4
arch/arm/boot/dts/tegra30.dtsi
View File

@ -1013,5 +1013,9 @@
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&{/cpus/cpu@0}>,
<&{/cpus/cpu@1}>,
<&{/cpus/cpu@2}>,
<&{/cpus/cpu@3}>;
}; };
}; };