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MIPS: Alchemy: fix dbdma2
Various fixes for the Au1200/Au1550/Au1300 DBDMA2 code: - skip cache invalidation if chip has working coherency circuitry. - invalidate KSEG0-portion of the (physical) data address. - force the dma channel doorbell write out to bus immediately with a sync. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -30,6 +30,7 @@
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*
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*/
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#include <linux/dma-map-ops.h> /* for dma_default_coherent */
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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@ -623,17 +624,18 @@ u32 au1xxx_dbdma_put_source(u32 chanid, dma_addr_t buf, int nbytes, u32 flags)
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dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
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/*
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* There is an errata on the Au1200/Au1550 parts that could result
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* in "stale" data being DMA'ed. It has to do with the snoop logic on
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* the cache eviction buffer. DMA_NONCOHERENT is on by default for
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* these parts. If it is fixed in the future, these dma_cache_inv will
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* just be nothing more than empty macros. See io.h.
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* There is an erratum on certain Au1200/Au1550 revisions that could
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* result in "stale" data being DMA'ed. It has to do with the snoop
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* logic on the cache eviction buffer. dma_default_coherent is set
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* to false on these parts.
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*/
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dma_cache_wback_inv((unsigned long)buf, nbytes);
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if (!dma_default_coherent)
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dma_cache_wback_inv(KSEG0ADDR(buf), nbytes);
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dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
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wmb(); /* drain writebuffer */
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dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
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ctp->chan_ptr->ddma_dbell = 0;
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wmb(); /* force doorbell write out to dma engine */
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/* Get next descriptor pointer. */
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ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
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@ -685,17 +687,18 @@ u32 au1xxx_dbdma_put_dest(u32 chanid, dma_addr_t buf, int nbytes, u32 flags)
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dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
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#endif
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/*
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* There is an errata on the Au1200/Au1550 parts that could result in
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* "stale" data being DMA'ed. It has to do with the snoop logic on the
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* cache eviction buffer. DMA_NONCOHERENT is on by default for these
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* parts. If it is fixed in the future, these dma_cache_inv will just
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* be nothing more than empty macros. See io.h.
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* There is an erratum on certain Au1200/Au1550 revisions that could
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* result in "stale" data being DMA'ed. It has to do with the snoop
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* logic on the cache eviction buffer. dma_default_coherent is set
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* to false on these parts.
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*/
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dma_cache_inv((unsigned long)buf, nbytes);
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if (!dma_default_coherent)
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dma_cache_inv(KSEG0ADDR(buf), nbytes);
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dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
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wmb(); /* drain writebuffer */
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dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
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ctp->chan_ptr->ddma_dbell = 0;
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wmb(); /* force doorbell write out to dma engine */
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/* Get next descriptor pointer. */
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ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
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