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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Browse Source 
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode_amd: Add support for CPU family specific container files
  x86/amd: Add missing feature flag for fam15h models 10h-1fh processors
  x86/boot-image: Don't leak phdrs in arch/x86/boot/compressed/misc.c::Parse_elf()
  x86/numachip: Drop unnecessary conflict with EDAC
  x86/uv: Fix uninitialized spinlocks
  x86/uv: Fix uv_gpa_to_soc_phys_ram() shift
This commit is contained in:
Linus Torvalds 2012-01-26 12:46:07 -08:00
commit 2d3c7efa50
7 changed files with 30 additions and 6 deletions
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1
arch/x86/Kconfig
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@ -360,7 +360,6 @@ config X86_NUMACHIP
depends on NUMA
depends on SMP
depends on X86_X2APIC
depends on !EDAC_AMD64
---help---
Adds support for Numascale NumaChip large-SMP systems. Needed to
enable more than ~168 cores.

2
arch/x86/boot/compressed/misc.c
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@ -321,6 +321,8 @@ static void parse_elf(void *output)
default: /* Ignore other PT_* */ break;
}
}
free(phdrs);
}
asmlinkage void decompress_kernel(void *rmode, memptr heap,

1
arch/x86/include/asm/cpufeature.h
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@ -159,6 +159,7 @@
#define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */
#define X86_FEATURE_LWP (6*32+15) /* Light Weight Profiling */
#define X86_FEATURE_FMA4 (6*32+16) /* 4 operands MAC instructions */
#define X86_FEATURE_TCE (6*32+17) /* translation cache extension */
#define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */
#define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */
#define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */

4
arch/x86/include/asm/uv/uv_hub.h
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@ -318,13 +318,13 @@ uv_gpa_in_mmr_space(unsigned long gpa)
/* UV global physical address --> socket phys RAM */
static inline unsigned long uv_gpa_to_soc_phys_ram(unsigned long gpa)
{
unsigned long paddr = gpa & uv_hub_info->gpa_mask;
unsigned long paddr;
unsigned long remap_base = uv_hub_info->lowmem_remap_base;
unsigned long remap_top = uv_hub_info->lowmem_remap_top;
gpa = ((gpa << uv_hub_info->m_shift) >> uv_hub_info->m_shift) |
((gpa >> uv_hub_info->n_lshift) << uv_hub_info->m_val);
gpa = gpa & uv_hub_info->gpa_mask;
paddr = gpa & uv_hub_info->gpa_mask;
if (paddr >= remap_base && paddr < remap_base + remap_top)
paddr -= remap_base;
return paddr;

24
arch/x86/kernel/microcode_amd.c
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@ -311,13 +311,33 @@ out:
return state;
}
/*
* AMD microcode firmware naming convention, up to family 15h they are in
* the legacy file:
*
* amd-ucode/microcode_amd.bin
*
* This legacy file is always smaller than 2K in size.
*
* Starting at family 15h they are in family specific firmware files:
*
* amd-ucode/microcode_amd_fam15h.bin
* amd-ucode/microcode_amd_fam16h.bin
* ...
*
* These might be larger than 2K.
*/
static enum ucode_state request_microcode_amd(int cpu, struct device *device)
{
const char *fw_name = "amd-ucode/microcode_amd.bin";
char fw_name[36] = "amd-ucode/microcode_amd.bin";
const struct firmware *fw;
enum ucode_state ret = UCODE_NFOUND;
struct cpuinfo_x86 *c = &cpu_data(cpu);
if (request_firmware(&fw, fw_name, device)) {
if (c->x86 >= 0x15)
snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
if (request_firmware(&fw, (const char *)fw_name, device)) {
pr_err("failed to load file %s\n", fw_name);
goto out;
}

2
arch/x86/platform/uv/tlb_uv.c
View File

@ -1851,6 +1851,8 @@ static void __init init_per_cpu_tunables(void)
bcp->cong_reps = congested_reps;
bcp->cong_period = congested_period;
bcp->clocks_per_100_usec = usec_2_cycles(100);
spin_lock_init(&bcp->queue_lock);
spin_lock_init(&bcp->uvhub_lock);
}
}

2
arch/x86/platform/uv/uv_irq.c
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@ -25,7 +25,7 @@ struct uv_irq_2_mmr_pnode{
int irq;
};
static spinlock_t uv_irq_lock;
static DEFINE_SPINLOCK(uv_irq_lock);
static struct rb_root uv_irq_root;
static int uv_set_irq_affinity(struct irq_data *, const struct cpumask *, bool);