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Devicetree changes for omaps for v5.14 merge window

Browse Source 
Mostly just clean-up for device tree binding checks with
 few other clean-up patches:
 
 - Drop ov5640 sensor for dra76-evm, it's just one of the
   optional additional sensors and makes hard to use any of
   the other options, TI is using the devicetree overlay
   snippets for these
 
 - Group the phandles in osd3358-sm-red to make the files
   more readable
 
 - A series of gpio clean-up patches to follow the binding
   documentation
 
 - Move ti,no-reset related properties to the target module
   level, the ti-sysc driver handles them also in the child
   but they really belong to the target module
 
 - Drop the unnecessary uart compatible entries to make the
   binding check to work
 
 - Mailbox related updates to make the binding check to
   work
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Merge tag 'omap-for-v5.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.14 merge window

Mostly just clean-up for device tree binding checks with
few other clean-up patches:

- Drop ov5640 sensor for dra76-evm, it's just one of the
  optional additional sensors and makes hard to use any of
  the other options, TI is using the devicetree overlay
  snippets for these

- Group the phandles in osd3358-sm-red to make the files
  more readable

- A series of gpio clean-up patches to follow the binding
  documentation

- Move ti,no-reset related properties to the target module
  level, the ti-sysc driver handles them also in the child
  but they really belong to the target module

- Drop the unnecessary uart compatible entries to make the
  binding check to work

- Mailbox related updates to make the binding check to
  work

* tag 'omap-for-v5.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: OMAP2+: Replace underscores in sub-mailbox node names
  ARM: dts: AM33xx/AM43xx: Rename wkup_m3 sub-mailbox node
  ARM: dts: OMAP2/OMAP3: Rename processor sub-mailbox nodes
  ARM: dts: OMAP2420: Drop interrupt-names from mailbox node
  ARM: dts: am437x-l4: Drop ti,omap2-uart entry from UART nodes
  ARM: dts: dra7-l4: Drop ti,omap4-uart entry from UART nodes
  ARM: dts: am335x: fix ti,no-reset-on-init flag for gpios
  ARM: dts: am437x-gp-evm: fix ti,no-reset-on-init flag for gpios
  ARM: dts: am57xx-cl-som-am57x: fix ti,no-reset-on-init flag for gpios
  ARM: dts: dra7x-evm: Align GPIO hog names with dt-schema
  ARM: dts: omap5-board-common: align gpio hog names with dt-schema
  ARM: dts: omap3: align gpio hog names with dt-schema
  ARM: dts: am437x: align gpio hog names with dt-schema
  ARM: dts: am335x: align GPIO hog names with dt-schema
  ARM: dts: osd3358-sm-red: group in the same phandle all its properties
  ARM: dts: dra76-evm: remove ov5640

Link: https://lore.kernel.org/r/pull-1622618286-677305@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2021-06-12 08:33:21 -07:00
commit 2d08a11e2d
33 changed files with 139 additions and 181 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/am335x-baltos.dtsi
View File

@ -393,10 +393,10 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};
&gpio3 {
&gpio3_target {
ti,no-reset-on-init;
};

2
arch/arm/boot/dts/am335x-boneblack-wireless.dts
View File

@ -101,7 +101,7 @@
};
&gpio3 {
ls_buf_en {
ls-buf-en-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;

2
arch/arm/boot/dts/am335x-boneblue.dts
View File

@ -436,7 +436,7 @@
};
&gpio3 {
ls_buf_en {
ls-buf-en-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;

4
arch/arm/boot/dts/am335x-bonegreen-wireless.dts
View File

@ -101,7 +101,7 @@
};
&gpio1 {
ls_buf_en {
ls-buf-en-hog {
gpio-hog;
gpios = <29 GPIO_ACTIVE_HIGH>;
output-high;
@ -118,7 +118,7 @@
/* an external pulldown on U21 pin 4. */
&gpio3 {
bt_aud_in {
bt-aud-in-hog {
gpio-hog;
gpios = <16 GPIO_ACTIVE_HIGH>;
output-low;

2
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -646,7 +646,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

4
arch/arm/boot/dts/am335x-icev2.dts
View File

@ -458,14 +458,14 @@
};
&gpio3 {
p4 {
pr1-mii-ctl-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PR1_MII_CTRL";
};
p10 {
mux-mii-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */

2
arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi
View File

@ -150,7 +150,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

2
arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi
View File

@ -353,7 +353,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

132
arch/arm/boot/dts/am335x-osd3358-sm-red.dts
View File

@ -25,10 +25,6 @@
regulator-always-on;
};
&mmc1 {
vmmc-supply = <&vmmcsd_fixed>;
};
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
@ -37,68 +33,6 @@
status = "okay";
};
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
>;
};
mcasp0_pins: mcasp0-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
>;
};
flash_enable: flash-enable {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
>;
};
imu_interrupt: imu-interrupt {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */
>;
};
ethernet_interrupt: ethernet-interrupt{
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */
>;
};
};
&lcdc {
status = "okay";
@ -167,10 +101,6 @@
};
};
&rtc {
system-power-controller;
};
&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
@ -267,6 +197,66 @@
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
>;
};
mcasp0_pins: mcasp0-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
>;
};
flash_enable: flash-enable {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
>;
};
imu_interrupt: imu-interrupt {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */
>;
};
ethernet_interrupt: ethernet-interrupt{
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */
>;
};
user_leds_s0: user-leds-s0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
@ -427,6 +417,7 @@
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
@ -434,6 +425,7 @@
};
&rtc {
system-power-controller;
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
};

8
arch/arm/boot/dts/am335x-shc.dts
View File

@ -140,14 +140,14 @@
};
&gpio1 {
hmtc_rst {
hmtc-rst-hog {
gpio-hog;
gpios = <24 GPIO_ACTIVE_LOW>;
output-high;
line-name = "homematic_reset";
};
hmtc_prog {
hmtc-prog-hog {
gpio-hog;
gpios = <27 GPIO_ACTIVE_LOW>;
output-high;
@ -156,14 +156,14 @@
};
&gpio3 {
zgb_rst {
zgb-rst-hog {
gpio-hog;
gpios = <18 GPIO_ACTIVE_LOW>;
output-low;
line-name = "zigbee_reset";
};
zgb_boot {
zgb-boot-hog {
gpio-hog;
gpios = <19 GPIO_ACTIVE_HIGH>;
output-high;

4
arch/arm/boot/dts/am33xx-l4.dtsi
View File

@ -1486,7 +1486,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
mbox_wkupm3: wkup_m3 {
mbox_wkupm3: mbox-wkup-m3 {
ti,mbox-send-noirq;
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <0 0 3>;
@ -1789,7 +1789,7 @@
};
};
target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0xae000 0x4>,
<0xae010 0x4>,

9
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@ -786,7 +786,7 @@
pinctrl-0 = <&gpio0_pins>;
status = "okay";
p23 {
sel-emmc-nand-hog {
gpio-hog;
gpios = <23 GPIO_ACTIVE_HIGH>;
/* SelEMMCorNAND selects between eMMC and NAND:
@ -813,13 +813,16 @@
status = "okay";
};
&gpio5_target {
ti,no-reset-on-init;
};
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&display_mux_pins>;
status = "okay";
ti,no-reset-on-init;
p8 {
sel-lcd-hdmi-hog {
/*
* SelLCDorHDMI selects between display and audio paths:
* Low: HDMI display with audio via HDMI

16
arch/arm/boot/dts/am437x-l4.dtsi
View File

@ -194,7 +194,7 @@
ranges = <0x0 0x9000 0x1000>;
uart0: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
};
@ -712,7 +712,7 @@
ranges = <0x0 0x22000 0x1000>;
uart1: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -740,7 +740,7 @@
ranges = <0x0 0x24000 0x1000>;
uart2: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -1168,7 +1168,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
mbox_wkupm3: wkup_m3 {
mbox_wkupm3: mbox-wkup-m3 {
ti,mbox-send-noirq;
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <0 0 3>;
@ -1399,7 +1399,7 @@
ranges = <0x0 0xa6000 0x1000>;
uart3: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -1427,7 +1427,7 @@
ranges = <0x0 0xa8000 0x1000>;
uart4: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -1455,7 +1455,7 @@
ranges = <0x0 0xaa000 0x1000>;
uart5: serial@0 {
compatible = "ti,am4372-uart","ti,omap2-uart";
compatible = "ti,am4372-uart";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -2070,7 +2070,7 @@
};
};
target-module@22000 { /* 0x48322000, ap 116 64.0 */
gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x22000 0x4>,
<0x22010 0x4>,

2
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -725,7 +725,7 @@
pinctrl-0 = <&display_mux_pins>;
status = "okay";
p1 {
sel-lcd-hdmi-hog {
/*
* SelLCDorHDMI selects between display and audio paths:
* Low: HDMI display with audio via HDMI

13
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
View File

@ -454,20 +454,20 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};
@ -610,12 +610,11 @@
>;
};
&gpio3 {
status = "okay";
&gpio3_target {
ti,no-reset-on-init;
};
&gpio2 {
&gpio2_target {
status = "okay";
ti,no-reset-on-init;
};

2
arch/arm/boot/dts/dm816x.dtsi
View File

@ -351,7 +351,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <0 0 0>;
};

2
arch/arm/boot/dts/dra7-evm.dts
View File

@ -366,7 +366,7 @@
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;

6
arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi
View File

@ -5,17 +5,17 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
};

24
arch/arm/boot/dts/dra7-l4.dtsi
View File

@ -1159,7 +1159,7 @@
ranges = <0x0 0x20000 0x1000>;
uart3: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -1343,7 +1343,7 @@
};
};
target-module@55000 { /* 0x48055000, ap 13 0e.0 */
gpio2_target: target-module@55000 { /* 0x48055000, ap 13 0e.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x55000 0x4>,
<0x55010 0x4>,
@ -1376,7 +1376,7 @@
};
};
target-module@57000 { /* 0x48057000, ap 15 06.0 */
gpio3_target: target-module@57000 { /* 0x48057000, ap 15 06.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x57000 0x4>,
<0x57010 0x4>,
@ -1562,7 +1562,7 @@
ranges = <0x0 0x66000 0x1000>;
uart5: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -1594,7 +1594,7 @@
ranges = <0x0 0x68000 0x1000>;
uart6: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -1626,7 +1626,7 @@
ranges = <0x0 0x6a000 0x1000>;
uart1: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -1658,7 +1658,7 @@
ranges = <0x0 0x6c000 0x1000>;
uart2: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -1690,7 +1690,7 @@
ranges = <0x0 0x6e000 0x1000>;
uart4: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -2424,7 +2424,7 @@
ranges = <0x0 0x20000 0x1000>;
uart7: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -2454,7 +2454,7 @@
ranges = <0x0 0x22000 0x1000>;
uart8: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -2484,7 +2484,7 @@
ranges = <0x0 0x24000 0x1000>;
uart9: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
@ -4530,7 +4530,7 @@
ranges = <0x0 0xb000 0x1000>;
uart10: serial@0 {
compatible = "ti,dra742-uart", "ti,omap4-uart";
compatible = "ti,dra742-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;

2
arch/arm/boot/dts/dra71-evm.dts
View File

@ -187,7 +187,7 @@
};
&pcf_hdmi {
p0 {
hdmi-i2c-disable-hog {
/*
* PM_OEn to High: Disable routing I2C3 to PM_I2C
* With this PM_SEL(p3) should not matter

2
arch/arm/boot/dts/dra72-evm-common.dtsi
View File

@ -268,7 +268,7 @@
*/
lines-initial-states = <0x0f2b>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;

6
arch/arm/boot/dts/dra72x.dtsi
View File

@ -77,12 +77,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@ -90,7 +90,7 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";

2
arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi
View File

@ -6,7 +6,7 @@
#include "dra7-ipu-dsp-common.dtsi"
&mailbox6 {
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};

8
arch/arm/boot/dts/dra74x.dtsi
View File

@ -188,12 +188,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@ -201,12 +201,12 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";

37
arch/arm/boot/dts/dra76-evm.dts
View File

@ -158,12 +158,6 @@
regulator-max-microvolt = <1800000>;
};
clk_ov5640_fixed: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
hdmi0: connector {
compatible = "hdmi-connector";
label = "hdmi";
@ -381,7 +375,7 @@
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
@ -406,27 +400,6 @@
};
};
&i2c5 {
status = "okay";
clock-frequency = <400000>;
ov5640@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
clocks = <&clk_ov5640_fixed>;
clock-names = "xclk";
port {
csi2_cam0: endpoint {
remote-endpoint = <&csi2_phy0>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
};
&cpu0 {
vdd-supply = <&buck10_reg>;
};
@ -573,14 +546,6 @@
};
};
&csi2_0 {
csi2_phy0: endpoint {
remote-endpoint = <&csi2_cam0>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
&ipu2 {
status = "okay";
memory-region = <&ipu2_cma_pool>;

5
arch/arm/boot/dts/omap2420.dtsi
View File

@ -192,16 +192,15 @@
compatible = "ti,omap2-mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>, <34>;
interrupt-names = "dsp", "iva";
ti,hwmods = "mailbox";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <6>;
mbox_dsp: dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_iva: iva {
mbox_iva: mbox-iva {
ti,mbox-tx = <2 1 3>;
ti,mbox-rx = <3 1 3>;
};

2
arch/arm/boot/dts/omap2430.dtsi
View File

@ -284,7 +284,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <6>;
mbox_dsp: dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};

2
arch/arm/boot/dts/omap3-evm-processor-common.dtsi
View File

@ -195,7 +195,7 @@
* for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
*/
&gpio2 {
en_usb2_port {
en-usb2-port-hog {
gpio-hog;
gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */
output-low;

2
arch/arm/boot/dts/omap3-gta04a5.dts
View File

@ -37,7 +37,7 @@
};
&gpio5 {
irda_en {
irda-en-hog {
gpio-hog;
gpios = <(175-160) GPIO_ACTIVE_HIGH>;
output-high; /* activate gpio_175 to disable IrDA receiver */

2
arch/arm/boot/dts/omap3.dtsi
View File

@ -440,7 +440,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <2>;
ti,mbox-num-fifos = <2>;
mbox_dsp: dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};

4
arch/arm/boot/dts/omap4-l4.dtsi
View File

@ -600,11 +600,11 @@
#mbox-cells = <1>;
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu {
mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>;
};

2
arch/arm/boot/dts/omap5-board-common.dtsi
View File

@ -149,7 +149,7 @@
&gpio8 {
/* TI trees use GPIO instead of msecure, see also muxing */
p234 {
msecure-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;

4
arch/arm/boot/dts/omap5-l4.dtsi
View File

@ -616,11 +616,11 @@
#mbox-cells = <1>;
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu {
mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>;
};