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s390/cpum_sf: Support ioctl PERF_EVENT_IOC_PERIOD
A perf_event can be set up to deliver overflow notifications via SIGIO signal. The setup of the event is: 1. create event with perf_event_open() 2. assign it a signal for I/O notification with fcntl() 3. Install signal handler and consume samples The initial setup of perf_event_open() determines the period/frequency time span needed to elapse before each signal is delivered to the user process. While the event is active, system call ioctl(.., PERF_EVENT_IOC_PERIOD, value) can be used the change the frequency/period time span of the active event. The remaining signal handler invocations honour the new value. This does not work on s390. In fact the time span does not change regardless of ioctl's third argument 'value'. The call succeeds but the time span does not change. Support this behavior and make it common with other platforms. This is achieved by changing the interval value of the sampling control block accordingly and feed this new value every time the event is enabled using pmu_event_enable(). Before this change the interval value was set only once at pmu_event_add() and never changed. Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
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cf2957f390
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2cb549a821
@ -60,6 +60,7 @@ struct perf_sf_sde_regs {
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#define PERF_CPUM_SF_MODE_MASK (PERF_CPUM_SF_BASIC_MODE| \
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PERF_CPUM_SF_DIAG_MODE)
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#define PERF_CPUM_SF_FULL_BLOCKS 0x0004 /* Process full SDBs only */
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#define PERF_CPUM_SF_FREQ_MODE 0x0008 /* Sampling with frequency */
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#define REG_NONE 0
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#define REG_OVERFLOW 1
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@ -70,5 +71,6 @@ struct perf_sf_sde_regs {
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#define SAMPL_FLAGS(hwc) ((hwc)->config_base)
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#define SAMPL_DIAG_MODE(hwc) (SAMPL_FLAGS(hwc) & PERF_CPUM_SF_DIAG_MODE)
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#define SDB_FULL_BLOCKS(hwc) (SAMPL_FLAGS(hwc) & PERF_CPUM_SF_FULL_BLOCKS)
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#define SAMPLE_FREQ_MODE(hwc) (SAMPL_FLAGS(hwc) & PERF_CPUM_SF_FREQ_MODE)
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#endif /* _ASM_S390_PERF_EVENT_H */
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@ -673,13 +673,89 @@ out:
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rcu_read_unlock();
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}
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static unsigned long getrate(bool freq, unsigned long sample,
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struct hws_qsi_info_block *si)
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{
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unsigned long rate;
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if (freq) {
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rate = freq_to_sample_rate(si, sample);
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rate = hw_limit_rate(si, rate);
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} else {
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/* The min/max sampling rates specifies the valid range
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* of sample periods. If the specified sample period is
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* out of range, limit the period to the range boundary.
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*/
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rate = hw_limit_rate(si, sample);
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/* The perf core maintains a maximum sample rate that is
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* configurable through the sysctl interface. Ensure the
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* sampling rate does not exceed this value. This also helps
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* to avoid throttling when pushing samples with
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* perf_event_overflow().
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*/
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if (sample_rate_to_freq(si, rate) >
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sysctl_perf_event_sample_rate) {
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debug_sprintf_event(sfdbg, 1,
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"Sampling rate exceeds maximum "
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"perf sample rate\n");
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rate = 0;
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}
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}
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return rate;
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}
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/* The sampling information (si) contains information about the
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* min/max sampling intervals and the CPU speed. So calculate the
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* correct sampling interval and avoid the whole period adjust
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* feedback loop.
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*
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* Since the CPU Measurement sampling facility can not handle frequency
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* calculate the sampling interval when frequency is specified using
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* this formula:
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* interval := cpu_speed * 1000000 / sample_freq
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*
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* Returns errno on bad input and zero on success with parameter interval
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* set to the correct sampling rate.
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*
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* Note: This function turns off freq bit to avoid calling function
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* perf_adjust_period(). This causes frequency adjustment in the common
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* code part which causes tremendous variations in the counter values.
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*/
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static int __hw_perf_event_init_rate(struct perf_event *event,
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struct hws_qsi_info_block *si)
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{
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struct perf_event_attr *attr = &event->attr;
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struct hw_perf_event *hwc = &event->hw;
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unsigned long rate;
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if (attr->freq) {
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if (!attr->sample_freq)
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return -EINVAL;
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rate = getrate(attr->freq, attr->sample_freq, si);
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attr->freq = 0; /* Don't call perf_adjust_period() */
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SAMPL_FLAGS(hwc) |= PERF_CPUM_SF_FREQ_MODE;
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} else {
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rate = getrate(attr->freq, attr->sample_period, si);
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if (!rate)
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return -EINVAL;
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}
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attr->sample_period = rate;
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SAMPL_RATE(hwc) = rate;
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hw_init_period(hwc, SAMPL_RATE(hwc));
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debug_sprintf_event(sfdbg, 4, "__hw_perf_event_init_rate:"
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"cpu:%d period:%llx freq:%d,%#lx\n", event->cpu,
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event->attr.sample_period, event->attr.freq,
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SAMPLE_FREQ_MODE(hwc));
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return 0;
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}
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static int __hw_perf_event_init(struct perf_event *event)
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{
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struct cpu_hw_sf *cpuhw;
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struct hws_qsi_info_block si;
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struct perf_event_attr *attr = &event->attr;
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struct hw_perf_event *hwc = &event->hw;
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unsigned long rate;
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int cpu, err;
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/* Reserve CPU-measurement sampling facility */
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@ -745,43 +821,9 @@ static int __hw_perf_event_init(struct perf_event *event)
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if (attr->config1 & PERF_CPUM_SF_FULL_BLOCKS)
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SAMPL_FLAGS(hwc) |= PERF_CPUM_SF_FULL_BLOCKS;
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/* The sampling information (si) contains information about the
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* min/max sampling intervals and the CPU speed. So calculate the
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* correct sampling interval and avoid the whole period adjust
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* feedback loop.
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*/
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rate = 0;
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if (attr->freq) {
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if (!attr->sample_freq) {
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err = -EINVAL;
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goto out;
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}
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rate = freq_to_sample_rate(&si, attr->sample_freq);
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rate = hw_limit_rate(&si, rate);
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attr->freq = 0;
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attr->sample_period = rate;
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} else {
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/* The min/max sampling rates specifies the valid range
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* of sample periods. If the specified sample period is
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* out of range, limit the period to the range boundary.
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*/
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rate = hw_limit_rate(&si, hwc->sample_period);
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/* The perf core maintains a maximum sample rate that is
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* configurable through the sysctl interface. Ensure the
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* sampling rate does not exceed this value. This also helps
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* to avoid throttling when pushing samples with
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* perf_event_overflow().
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*/
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if (sample_rate_to_freq(&si, rate) >
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sysctl_perf_event_sample_rate) {
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err = -EINVAL;
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debug_sprintf_event(sfdbg, 1, "Sampling rate exceeds maximum perf sample rate\n");
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goto out;
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}
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}
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SAMPL_RATE(hwc) = rate;
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hw_init_period(hwc, SAMPL_RATE(hwc));
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err = __hw_perf_event_init_rate(event, &si);
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if (err)
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goto out;
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/* Initialize sample data overflow accounting */
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hwc->extra_reg.reg = REG_OVERFLOW;
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@ -904,6 +946,8 @@ static void cpumsf_pmu_enable(struct pmu *pmu)
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if (sfb_has_pending_allocs(&cpuhw->sfb, hwc))
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extend_sampling_buffer(&cpuhw->sfb, hwc);
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}
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/* Rate may be adjusted with ioctl() */
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cpuhw->lsctl.interval = SAMPL_RATE(&cpuhw->event->hw);
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}
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/* (Re)enable the PMU and sampling facility */
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@ -922,8 +966,9 @@ static void cpumsf_pmu_enable(struct pmu *pmu)
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lpp(&S390_lowcore.lpp);
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debug_sprintf_event(sfdbg, 6, "pmu_enable: es=%i cs=%i ed=%i cd=%i "
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"tear=%p dear=%p\n", cpuhw->lsctl.es,
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cpuhw->lsctl.cs, cpuhw->lsctl.ed, cpuhw->lsctl.cd,
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"interval:%lx tear=%p dear=%p\n",
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cpuhw->lsctl.es, cpuhw->lsctl.cs, cpuhw->lsctl.ed,
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cpuhw->lsctl.cd, cpuhw->lsctl.interval,
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(void *) cpuhw->lsctl.tear,
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(void *) cpuhw->lsctl.dear);
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}
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@ -1717,6 +1762,44 @@ static void cpumsf_pmu_read(struct perf_event *event)
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/* Nothing to do ... updates are interrupt-driven */
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}
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/* Check if the new sampling period/freqeuncy is appropriate.
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*
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* Return non-zero on error and zero on passed checks.
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*/
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static int cpumsf_pmu_check_period(struct perf_event *event, u64 value)
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{
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struct hws_qsi_info_block si;
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unsigned long rate;
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bool do_freq;
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memset(&si, 0, sizeof(si));
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if (event->cpu == -1) {
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if (qsi(&si))
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return -ENODEV;
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} else {
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/* Event is pinned to a particular CPU, retrieve the per-CPU
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* sampling structure for accessing the CPU-specific QSI.
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*/
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struct cpu_hw_sf *cpuhw = &per_cpu(cpu_hw_sf, event->cpu);
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si = cpuhw->qsi;
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}
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do_freq = !!SAMPLE_FREQ_MODE(&event->hw);
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rate = getrate(do_freq, value, &si);
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if (!rate)
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return -EINVAL;
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event->attr.sample_period = rate;
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SAMPL_RATE(&event->hw) = rate;
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hw_init_period(&event->hw, SAMPL_RATE(&event->hw));
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debug_sprintf_event(sfdbg, 4, "cpumsf_pmu_check_period:"
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"cpu:%d value:%llx period:%llx freq:%d\n",
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event->cpu, value,
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event->attr.sample_period, do_freq);
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return 0;
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}
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/* Activate sampling control.
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* Next call of pmu_enable() starts sampling.
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*/
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@ -1908,6 +1991,8 @@ static struct pmu cpumf_sampling = {
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.setup_aux = aux_buffer_setup,
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.free_aux = aux_buffer_free,
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.check_period = cpumsf_pmu_check_period,
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};
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static void cpumf_measurement_alert(struct ext_code ext_code,
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