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igc: fix the validation logic for taprio's gate list
The check introduced in the commita5fd39464a
("igc: Lift TAPRIO schedule restriction") can detect a false positive error in some corner case. For instance, tc qdisc replace ... taprio num_tc 4 ... sched-entry S 0x01 100000 # slot#1 sched-entry S 0x03 100000 # slot#2 sched-entry S 0x04 100000 # slot#3 sched-entry S 0x08 200000 # slot#4 flags 0x02 # hardware offload Here the queue#0 (the first queue) is on at the slot#1 and #2, and off at the slot#3 and #4. Under the current logic, when the slot#4 is examined, validate_schedule() returns *false* since the enablement count for the queue#0 is two and it is already off at the previous slot (i.e. #3). But this definition is truely correct. Let's fix the logic to enforce a strict validation for consecutively-opened slots. Fixes:a5fd39464a
("igc: Lift TAPRIO schedule restriction") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Tested-by: Naama Meir <naamax.meir@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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@ -6010,13 +6010,13 @@ static bool validate_schedule(struct igc_adapter *adapter,
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if (e->command != TC_TAPRIO_CMD_SET_GATES)
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return false;
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for (i = 0; i < adapter->num_tx_queues; i++) {
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if (e->gate_mask & BIT(i))
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for (i = 0; i < adapter->num_tx_queues; i++)
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if (e->gate_mask & BIT(i)) {
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queue_uses[i]++;
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/* There are limitations: A single queue cannot be
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* opened and closed multiple times per cycle unless the
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* gate stays open. Check for it.
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/* There are limitations: A single queue cannot
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* be opened and closed multiple times per cycle
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* unless the gate stays open. Check for it.
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*/
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if (queue_uses[i] > 1 &&
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!(prev->gate_mask & BIT(i)))
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