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nEPT: Some additional comments
Some additional comments to preexisting code: Explain who (L0 or L1) handles EPT violation and misconfiguration exits. Don't mention "shadow on either EPT or shadow" as the only two options. Reviewed-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Nadav Har'El <nyh@il.ibm.com> Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Signed-off-by: Xinhao Xu <xinhao.xu@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -6669,7 +6669,20 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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return nested_cpu_has2(vmcs12,
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SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
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case EXIT_REASON_EPT_VIOLATION:
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/*
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* L0 always deals with the EPT violation. If nested EPT is
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* used, and the nested mmu code discovers that the address is
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* missing in the guest EPT table (EPT12), the EPT violation
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* will be injected with nested_ept_inject_page_fault()
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*/
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return 0;
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case EXIT_REASON_EPT_MISCONFIG:
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/*
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* L2 never uses directly L1's EPT, but rather L0's own EPT
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* table (shadow on EPT) or a merged EPT table that L0 built
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* (EPT on EPT). So any problems with the structure of the
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* table is L0's fault.
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*/
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return 0;
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case EXIT_REASON_PREEMPTION_TIMER:
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return vmcs12->pin_based_vm_exec_control &
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