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Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: [libata] kill ata_sg_is_last() Update libata driver for bf548 atapi controller against the 2.6.24 tree. libata-sff: Correct use of check_status() drivers/ata: add support to Freescale 3.0Gbps SATA Controller pata_acpi: fix build breakage if !CONFIG_PM
This commit is contained in:
commit
2af170dd24
@ -182,6 +182,15 @@ config PATA_ACPI
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firmware in the BIOS. This driver can sometimes handle
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otherwise unsupported hardware.
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config SATA_FSL
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tristate "Freescale 3.0Gbps SATA support"
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depends on PPC_MPC837x
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help
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This option enables support for Freescale 3.0Gbps SATA controller.
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It can be found on MPC837x and MPC8315.
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If unsure, say N.
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config PATA_ALI
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tristate "ALi PATA support (Experimental)"
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depends on PCI && EXPERIMENTAL
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@ -641,11 +650,4 @@ config PATA_BF54X
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If unsure, say N.
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config PATA_BF54X_DMA
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bool "DMA mode"
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depends on PATA_BF54X
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default y
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help
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Enable DMA mode for Blackfin ATAPI controller.
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endif # ATA
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@ -17,6 +17,7 @@ obj-$(CONFIG_SATA_ULI) += sata_uli.o
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obj-$(CONFIG_SATA_MV) += sata_mv.o
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obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
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obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
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obj-$(CONFIG_SATA_FSL) += sata_fsl.o
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obj-$(CONFIG_PATA_ALI) += pata_ali.o
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obj-$(CONFIG_PATA_AMD) += pata_amd.o
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@ -156,7 +156,7 @@ void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
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{
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struct ata_ioports *ioaddr = &ap->ioaddr;
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tf->command = ata_check_status(ap);
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tf->command = ata_chk_status(ap);
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tf->feature = ioread8(ioaddr->error_addr);
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tf->nsect = ioread8(ioaddr->nsect_addr);
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tf->lbal = ioread8(ioaddr->lbal_addr);
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@ -370,8 +370,10 @@ static struct pci_driver pacpi_pci_driver = {
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.id_table = pacpi_pci_tbl,
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.probe = pacpi_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init pacpi_init(void)
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@ -1092,14 +1092,15 @@ static unsigned int bfin_bus_softreset(struct ata_port *ap,
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* Note: Original code is ata_std_softreset().
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*/
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static int bfin_std_softreset(struct ata_port *ap, unsigned int *classes,
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static int bfin_std_softreset(struct ata_link *link, unsigned int *classes,
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unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
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unsigned int devmask = 0, err_mask;
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u8 err;
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if (ata_port_offline(ap)) {
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if (ata_link_offline(link)) {
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classes[0] = ATA_DEV_NONE;
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goto out;
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}
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@ -1122,9 +1123,11 @@ static int bfin_std_softreset(struct ata_port *ap, unsigned int *classes,
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}
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/* determine by signature whether we have ATA or ATAPI devices */
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classes[0] = ata_dev_try_classify(ap, 0, &err);
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classes[0] = ata_dev_try_classify(&ap->link.device[0],
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devmask & (1 << 0), &err);
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if (slave_possible && err != 0x81)
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classes[1] = ata_dev_try_classify(ap, 1, &err);
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classes[1] = ata_dev_try_classify(&ap->link.device[1],
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devmask & (1 << 1), &err);
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out:
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return 0;
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@ -1167,7 +1170,7 @@ static unsigned char bfin_bmdma_status(struct ata_port *ap)
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static void bfin_data_xfer(struct ata_device *adev, unsigned char *buf,
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unsigned int buflen, int write_data)
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{
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struct ata_port *ap = adev->ap;
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struct ata_port *ap = adev->link->ap;
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unsigned int words = buflen >> 1;
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unsigned short *buf16 = (u16 *) buf;
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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@ -1206,7 +1209,10 @@ static void bfin_irq_clear(struct ata_port *ap)
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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pr_debug("in atapi irq clear\n");
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ATAPI_SET_INT_STATUS(base, 0x1FF);
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ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
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| MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
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| MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
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}
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/**
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@ -1233,33 +1239,6 @@ static unsigned char bfin_irq_on(struct ata_port *ap)
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return tmp;
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}
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/**
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* bfin_irq_ack - Acknowledge a device interrupt.
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* @ap: Port on which interrupts are enabled.
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*
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* Note: Original code is ata_irq_ack().
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*/
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static unsigned char bfin_irq_ack(struct ata_port *ap, unsigned int chk_drq)
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{
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
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unsigned char status;
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pr_debug("in atapi irq ack\n");
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status = ata_busy_wait(ap, bits, 1000);
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if (status & bits)
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if (ata_msg_err(ap))
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dev_err(ap->dev, "abnormal status 0x%X\n", status);
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/* get controller status; clear intr, err bits */
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ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
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| MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
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| MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
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return bfin_bmdma_status(ap);
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}
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/**
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* bfin_bmdma_freeze - Freeze DMA controller port
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* @ap: port to freeze
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@ -1308,8 +1287,9 @@ void bfin_bmdma_thaw(struct ata_port *ap)
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* Note: Original code is ata_std_postreset().
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*/
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static void bfin_std_postreset(struct ata_port *ap, unsigned int *classes)
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static void bfin_std_postreset(struct ata_link *link, unsigned int *classes)
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{
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struct ata_port *ap = link->ap;
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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/* re-enable interrupts */
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@ -1395,7 +1375,6 @@ static struct scsi_host_template bfin_sht = {
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};
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static const struct ata_port_operations bfin_pata_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = bfin_set_piomode,
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.set_dmamode = bfin_set_dmamode,
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@ -1423,7 +1402,6 @@ static const struct ata_port_operations bfin_pata_ops = {
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.irq_handler = ata_interrupt,
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.irq_clear = bfin_irq_clear,
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.irq_on = bfin_irq_on,
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.irq_ack = bfin_irq_ack,
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.port_start = bfin_port_start,
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.port_stop = bfin_port_stop,
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@ -1437,11 +1415,7 @@ static struct ata_port_info bfin_port_info[] = {
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| ATA_FLAG_NO_LEGACY,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0,
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#ifdef CONFIG_PATA_BF54X_DMA
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.udma_mask = ATA_UDMA5,
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#else
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.udma_mask = 0,
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#endif
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.port_ops = &bfin_pata_ops,
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},
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};
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@ -1607,9 +1581,25 @@ static struct platform_driver bfin_atapi_driver = {
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},
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};
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#define ATAPI_MODE_SIZE 10
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static char bfin_atapi_mode[ATAPI_MODE_SIZE];
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static int __init bfin_atapi_init(void)
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{
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pr_info("register bfin atapi driver\n");
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switch(bfin_atapi_mode[0]) {
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case 'p':
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case 'P':
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break;
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case 'm':
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case 'M':
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bfin_port_info[0].mwdma_mask = ATA_MWDMA2;
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break;
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default:
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bfin_port_info[0].udma_mask = ATA_UDMA5;
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};
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return platform_driver_register(&bfin_atapi_driver);
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}
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@ -1620,6 +1610,13 @@ static void __exit bfin_atapi_exit(void)
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module_init(bfin_atapi_init);
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module_exit(bfin_atapi_exit);
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/*
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* ATAPI mode:
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* pio/PIO
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* udma/UDMA (default)
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* mwdma/MWDMA
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*/
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module_param_string(bfin_atapi_mode, bfin_atapi_mode, ATAPI_MODE_SIZE, 0);
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MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
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MODULE_DESCRIPTION("PATA driver for blackfin 54x ATAPI controller");
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@ -318,7 +318,7 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
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struct scatterlist *sg;
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struct ata_port *ap = qc->ap;
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struct adma_port_priv *pp = ap->private_data;
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u8 *buf = pp->pkt;
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u8 *buf = pp->pkt, *last_buf = NULL;
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int i = (2 + buf[3]) * 8;
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u8 pFLAGS = pORD | ((qc->tf.flags & ATA_TFLAG_WRITE) ? pDIRO : 0);
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@ -334,8 +334,7 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
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*(__le32 *)(buf + i) = cpu_to_le32(len);
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i += 4;
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if (ata_sg_is_last(sg, qc))
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pFLAGS |= pEND;
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last_buf = &buf[i];
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buf[i++] = pFLAGS;
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buf[i++] = qc->dev->dma_mode & 0xf;
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buf[i++] = 0; /* pPKLW */
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@ -348,6 +347,10 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
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VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
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(unsigned long)addr, len);
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}
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if (likely(last_buf))
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*last_buf |= pEND;
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return i;
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}
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1490
drivers/ata/sata_fsl.c
Normal file
1490
drivers/ata/sata_fsl.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -421,7 +421,6 @@ static void mv_error_handler(struct ata_port *ap);
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static void mv_post_int_cmd(struct ata_queued_cmd *qc);
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static void mv_eh_freeze(struct ata_port *ap);
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static void mv_eh_thaw(struct ata_port *ap);
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static int mv_slave_config(struct scsi_device *sdev);
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static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
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static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
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@ -459,7 +458,7 @@ static struct scsi_host_template mv5_sht = {
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.use_clustering = 1,
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.proc_name = DRV_NAME,
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.dma_boundary = MV_DMA_BOUNDARY,
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.slave_configure = mv_slave_config,
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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};
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@ -477,7 +476,7 @@ static struct scsi_host_template mv6_sht = {
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.use_clustering = 1,
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.proc_name = DRV_NAME,
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.dma_boundary = MV_DMA_BOUNDARY,
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.slave_configure = mv_slave_config,
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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};
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@ -756,17 +755,6 @@ static void mv_irq_clear(struct ata_port *ap)
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{
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}
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static int mv_slave_config(struct scsi_device *sdev)
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{
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int rc = ata_scsi_slave_config(sdev);
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if (rc)
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return rc;
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blk_queue_max_phys_segments(sdev->request_queue, MV_MAX_SG_CT / 2);
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return 0; /* scsi layer doesn't check return value, sigh */
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}
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static void mv_set_edma_ptrs(void __iomem *port_mmio,
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struct mv_host_priv *hpriv,
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struct mv_port_priv *pp)
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@ -1138,7 +1126,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
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{
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struct mv_port_priv *pp = qc->ap->private_data;
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struct scatterlist *sg;
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struct mv_sg *mv_sg;
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struct mv_sg *mv_sg, *last_sg = NULL;
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mv_sg = pp->sg_tbl;
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ata_for_each_sg(sg, qc) {
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@ -1159,13 +1147,13 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
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sg_len -= len;
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addr += len;
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if (!sg_len && ata_sg_is_last(sg, qc))
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mv_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
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last_sg = mv_sg;
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mv_sg++;
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}
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}
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if (likely(last_sg))
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last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
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}
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static inline void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
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|
@ -796,16 +796,19 @@ static inline void sil24_fill_sg(struct ata_queued_cmd *qc,
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struct sil24_sge *sge)
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{
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struct scatterlist *sg;
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struct sil24_sge *last_sge = NULL;
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ata_for_each_sg(sg, qc) {
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sge->addr = cpu_to_le64(sg_dma_address(sg));
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sge->cnt = cpu_to_le32(sg_dma_len(sg));
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if (ata_sg_is_last(sg, qc))
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sge->flags = cpu_to_le32(SGE_TRM);
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else
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sge->flags = 0;
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sge->flags = 0;
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last_sge = sge;
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sge++;
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}
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if (likely(last_sge))
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last_sge->flags = cpu_to_le32(SGE_TRM);
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}
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static int sil24_qc_defer(struct ata_queued_cmd *qc)
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|
@ -5134,6 +5134,7 @@ static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
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u32 ioadl_flags = 0;
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struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
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struct ipr_ioadl_desc *ioadl = ipr_cmd->ioadl;
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struct ipr_ioadl_desc *last_ioadl = NULL;
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int len = qc->nbytes + qc->pad_len;
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struct scatterlist *sg;
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@ -5156,11 +5157,13 @@ static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
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ata_for_each_sg(sg, qc) {
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ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
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ioadl->address = cpu_to_be32(sg_dma_address(sg));
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if (ata_sg_is_last(sg, qc))
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ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
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else
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ioadl++;
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last_ioadl = ioadl;
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ioadl++;
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}
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if (likely(last_ioadl))
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last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
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}
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/**
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|
@ -1037,18 +1037,6 @@ extern void ata_port_pbar_desc(struct ata_port *ap, int bar, ssize_t offset,
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/*
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* qc helpers
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*/
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static inline int
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ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
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{
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if (sg == &qc->pad_sgent)
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return 1;
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if (qc->pad_len)
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return 0;
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if (qc->n_iter == qc->n_elem)
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return 1;
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return 0;
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}
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static inline struct scatterlist *
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ata_qc_first_sg(struct ata_queued_cmd *qc)
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{
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|
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