Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  [libata] kill ata_sg_is_last()
  Update libata driver for bf548 atapi controller against the 2.6.24 tree.
  libata-sff: Correct use of check_status()
  drivers/ata: add support to Freescale 3.0Gbps SATA Controller
  pata_acpi: fix build breakage if !CONFIG_PM
This commit is contained in:
Linus Torvalds 2007-10-18 15:08:35 -07:00
commit 2af170dd24
11 changed files with 1567 additions and 90 deletions

View File

@ -182,6 +182,15 @@ config PATA_ACPI
firmware in the BIOS. This driver can sometimes handle
otherwise unsupported hardware.
config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
depends on PPC_MPC837x
help
This option enables support for Freescale 3.0Gbps SATA controller.
It can be found on MPC837x and MPC8315.
If unsure, say N.
config PATA_ALI
tristate "ALi PATA support (Experimental)"
depends on PCI && EXPERIMENTAL
@ -641,11 +650,4 @@ config PATA_BF54X
If unsure, say N.
config PATA_BF54X_DMA
bool "DMA mode"
depends on PATA_BF54X
default y
help
Enable DMA mode for Blackfin ATAPI controller.
endif # ATA

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@ -17,6 +17,7 @@ obj-$(CONFIG_SATA_ULI) += sata_uli.o
obj-$(CONFIG_SATA_MV) += sata_mv.o
obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_PATA_ALI) += pata_ali.o
obj-$(CONFIG_PATA_AMD) += pata_amd.o

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@ -156,7 +156,7 @@ void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->command = ata_check_status(ap);
tf->command = ata_chk_status(ap);
tf->feature = ioread8(ioaddr->error_addr);
tf->nsect = ioread8(ioaddr->nsect_addr);
tf->lbal = ioread8(ioaddr->lbal_addr);

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@ -370,8 +370,10 @@ static struct pci_driver pacpi_pci_driver = {
.id_table = pacpi_pci_tbl,
.probe = pacpi_init_one,
.remove = ata_pci_remove_one,
#ifdef CONFIG_PM
.suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume,
#endif
};
static int __init pacpi_init(void)

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@ -1092,14 +1092,15 @@ static unsigned int bfin_bus_softreset(struct ata_port *ap,
* Note: Original code is ata_std_softreset().
*/
static int bfin_std_softreset(struct ata_port *ap, unsigned int *classes,
static int bfin_std_softreset(struct ata_link *link, unsigned int *classes,
unsigned long deadline)
{
struct ata_port *ap = link->ap;
unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
unsigned int devmask = 0, err_mask;
u8 err;
if (ata_port_offline(ap)) {
if (ata_link_offline(link)) {
classes[0] = ATA_DEV_NONE;
goto out;
}
@ -1122,9 +1123,11 @@ static int bfin_std_softreset(struct ata_port *ap, unsigned int *classes,
}
/* determine by signature whether we have ATA or ATAPI devices */
classes[0] = ata_dev_try_classify(ap, 0, &err);
classes[0] = ata_dev_try_classify(&ap->link.device[0],
devmask & (1 << 0), &err);
if (slave_possible && err != 0x81)
classes[1] = ata_dev_try_classify(ap, 1, &err);
classes[1] = ata_dev_try_classify(&ap->link.device[1],
devmask & (1 << 1), &err);
out:
return 0;
@ -1167,7 +1170,7 @@ static unsigned char bfin_bmdma_status(struct ata_port *ap)
static void bfin_data_xfer(struct ata_device *adev, unsigned char *buf,
unsigned int buflen, int write_data)
{
struct ata_port *ap = adev->ap;
struct ata_port *ap = adev->link->ap;
unsigned int words = buflen >> 1;
unsigned short *buf16 = (u16 *) buf;
void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
@ -1206,7 +1209,10 @@ static void bfin_irq_clear(struct ata_port *ap)
void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
pr_debug("in atapi irq clear\n");
ATAPI_SET_INT_STATUS(base, 0x1FF);
ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
| MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
| MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
}
/**
@ -1233,33 +1239,6 @@ static unsigned char bfin_irq_on(struct ata_port *ap)
return tmp;
}
/**
* bfin_irq_ack - Acknowledge a device interrupt.
* @ap: Port on which interrupts are enabled.
*
* Note: Original code is ata_irq_ack().
*/
static unsigned char bfin_irq_ack(struct ata_port *ap, unsigned int chk_drq)
{
void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
unsigned char status;
pr_debug("in atapi irq ack\n");
status = ata_busy_wait(ap, bits, 1000);
if (status & bits)
if (ata_msg_err(ap))
dev_err(ap->dev, "abnormal status 0x%X\n", status);
/* get controller status; clear intr, err bits */
ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
| MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
| MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
return bfin_bmdma_status(ap);
}
/**
* bfin_bmdma_freeze - Freeze DMA controller port
* @ap: port to freeze
@ -1308,8 +1287,9 @@ void bfin_bmdma_thaw(struct ata_port *ap)
* Note: Original code is ata_std_postreset().
*/
static void bfin_std_postreset(struct ata_port *ap, unsigned int *classes)
static void bfin_std_postreset(struct ata_link *link, unsigned int *classes)
{
struct ata_port *ap = link->ap;
void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
/* re-enable interrupts */
@ -1395,7 +1375,6 @@ static struct scsi_host_template bfin_sht = {
};
static const struct ata_port_operations bfin_pata_ops = {
.port_disable = ata_port_disable,
.set_piomode = bfin_set_piomode,
.set_dmamode = bfin_set_dmamode,
@ -1423,7 +1402,6 @@ static const struct ata_port_operations bfin_pata_ops = {
.irq_handler = ata_interrupt,
.irq_clear = bfin_irq_clear,
.irq_on = bfin_irq_on,
.irq_ack = bfin_irq_ack,
.port_start = bfin_port_start,
.port_stop = bfin_port_stop,
@ -1437,11 +1415,7 @@ static struct ata_port_info bfin_port_info[] = {
| ATA_FLAG_NO_LEGACY,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0,
#ifdef CONFIG_PATA_BF54X_DMA
.udma_mask = ATA_UDMA5,
#else
.udma_mask = 0,
#endif
.port_ops = &bfin_pata_ops,
},
};
@ -1607,9 +1581,25 @@ static struct platform_driver bfin_atapi_driver = {
},
};
#define ATAPI_MODE_SIZE 10
static char bfin_atapi_mode[ATAPI_MODE_SIZE];
static int __init bfin_atapi_init(void)
{
pr_info("register bfin atapi driver\n");
switch(bfin_atapi_mode[0]) {
case 'p':
case 'P':
break;
case 'm':
case 'M':
bfin_port_info[0].mwdma_mask = ATA_MWDMA2;
break;
default:
bfin_port_info[0].udma_mask = ATA_UDMA5;
};
return platform_driver_register(&bfin_atapi_driver);
}
@ -1620,6 +1610,13 @@ static void __exit bfin_atapi_exit(void)
module_init(bfin_atapi_init);
module_exit(bfin_atapi_exit);
/*
* ATAPI mode:
* pio/PIO
* udma/UDMA (default)
* mwdma/MWDMA
*/
module_param_string(bfin_atapi_mode, bfin_atapi_mode, ATAPI_MODE_SIZE, 0);
MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
MODULE_DESCRIPTION("PATA driver for blackfin 54x ATAPI controller");

View File

@ -318,7 +318,7 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
struct scatterlist *sg;
struct ata_port *ap = qc->ap;
struct adma_port_priv *pp = ap->private_data;
u8 *buf = pp->pkt;
u8 *buf = pp->pkt, *last_buf = NULL;
int i = (2 + buf[3]) * 8;
u8 pFLAGS = pORD | ((qc->tf.flags & ATA_TFLAG_WRITE) ? pDIRO : 0);
@ -334,8 +334,7 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
*(__le32 *)(buf + i) = cpu_to_le32(len);
i += 4;
if (ata_sg_is_last(sg, qc))
pFLAGS |= pEND;
last_buf = &buf[i];
buf[i++] = pFLAGS;
buf[i++] = qc->dev->dma_mode & 0xf;
buf[i++] = 0; /* pPKLW */
@ -348,6 +347,10 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
(unsigned long)addr, len);
}
if (likely(last_buf))
*last_buf |= pEND;
return i;
}

1490
drivers/ata/sata_fsl.c Normal file

File diff suppressed because it is too large Load Diff

View File

@ -421,7 +421,6 @@ static void mv_error_handler(struct ata_port *ap);
static void mv_post_int_cmd(struct ata_queued_cmd *qc);
static void mv_eh_freeze(struct ata_port *ap);
static void mv_eh_thaw(struct ata_port *ap);
static int mv_slave_config(struct scsi_device *sdev);
static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
@ -459,7 +458,7 @@ static struct scsi_host_template mv5_sht = {
.use_clustering = 1,
.proc_name = DRV_NAME,
.dma_boundary = MV_DMA_BOUNDARY,
.slave_configure = mv_slave_config,
.slave_configure = ata_scsi_slave_config,
.slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
};
@ -477,7 +476,7 @@ static struct scsi_host_template mv6_sht = {
.use_clustering = 1,
.proc_name = DRV_NAME,
.dma_boundary = MV_DMA_BOUNDARY,
.slave_configure = mv_slave_config,
.slave_configure = ata_scsi_slave_config,
.slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
};
@ -756,17 +755,6 @@ static void mv_irq_clear(struct ata_port *ap)
{
}
static int mv_slave_config(struct scsi_device *sdev)
{
int rc = ata_scsi_slave_config(sdev);
if (rc)
return rc;
blk_queue_max_phys_segments(sdev->request_queue, MV_MAX_SG_CT / 2);
return 0; /* scsi layer doesn't check return value, sigh */
}
static void mv_set_edma_ptrs(void __iomem *port_mmio,
struct mv_host_priv *hpriv,
struct mv_port_priv *pp)
@ -1138,7 +1126,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
{
struct mv_port_priv *pp = qc->ap->private_data;
struct scatterlist *sg;
struct mv_sg *mv_sg;
struct mv_sg *mv_sg, *last_sg = NULL;
mv_sg = pp->sg_tbl;
ata_for_each_sg(sg, qc) {
@ -1159,13 +1147,13 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
sg_len -= len;
addr += len;
if (!sg_len && ata_sg_is_last(sg, qc))
mv_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
last_sg = mv_sg;
mv_sg++;
}
}
if (likely(last_sg))
last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
}
static inline void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)

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@ -796,16 +796,19 @@ static inline void sil24_fill_sg(struct ata_queued_cmd *qc,
struct sil24_sge *sge)
{
struct scatterlist *sg;
struct sil24_sge *last_sge = NULL;
ata_for_each_sg(sg, qc) {
sge->addr = cpu_to_le64(sg_dma_address(sg));
sge->cnt = cpu_to_le32(sg_dma_len(sg));
if (ata_sg_is_last(sg, qc))
sge->flags = cpu_to_le32(SGE_TRM);
else
sge->flags = 0;
last_sge = sge;
sge++;
}
if (likely(last_sge))
last_sge->flags = cpu_to_le32(SGE_TRM);
}
static int sil24_qc_defer(struct ata_queued_cmd *qc)

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@ -5134,6 +5134,7 @@ static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
u32 ioadl_flags = 0;
struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
struct ipr_ioadl_desc *ioadl = ipr_cmd->ioadl;
struct ipr_ioadl_desc *last_ioadl = NULL;
int len = qc->nbytes + qc->pad_len;
struct scatterlist *sg;
@ -5156,11 +5157,13 @@ static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
ata_for_each_sg(sg, qc) {
ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
ioadl->address = cpu_to_be32(sg_dma_address(sg));
if (ata_sg_is_last(sg, qc))
ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
else
last_ioadl = ioadl;
ioadl++;
}
if (likely(last_ioadl))
last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
}
/**

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@ -1037,18 +1037,6 @@ extern void ata_port_pbar_desc(struct ata_port *ap, int bar, ssize_t offset,
/*
* qc helpers
*/
static inline int
ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
{
if (sg == &qc->pad_sgent)
return 1;
if (qc->pad_len)
return 0;
if (qc->n_iter == qc->n_elem)
return 1;
return 0;
}
static inline struct scatterlist *
ata_qc_first_sg(struct ata_queued_cmd *qc)
{