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OpenRISC updates for 4.19
Just one change for 4.19: - Refactors from Christoph Hellwig to use generic DMA facilities -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJbfS0+AAoJEMOzHC1eZifkq9YP/1L9gyp8eolVe0q90rWdNIBf BxqfLZv2kyMJZsj0GxycXHMnob4q+cJbPxQlxJLk02tGO97l+ze9FfH4FL0gqYeM Ei2HeOJMxFX6w3/vHIw2UzzYXHoBpe06Kp1Za9GyJlyxiJ/MYvwASbC/LNo1/HxX exg7epXOAZFxmivWAPJiUcyNnMRLqSgzOGlg7HLfX7CTmjPkqDqDLNzwY/CgLxCW LuzEAFC/bPFadzfGOlMnww5j7zzobgjC9Zj+dOdZBnVmnIO8NdhFmiDTnKXVQsUr C+34Tf4LfiL/BigTAo9bjPJeY5fCsvcfbqnTCHXgCTBp80suXWjv8YZjfXOd6stI MU72RMwx5pFo6rsbcWAUULzHnAoEAeeyMWNbca/TJEMV5X1ift6R7qxd3ojrsD+R +I4wd00BJn0THrS9CUeGbqIOc8HYhpJialz8ZR2ucPVFGNFJoaGK6RUsPNZFjuq6 ErxOG4IcHZM9jJYCZJnw8uYNgDoZN00j3LBvpfC0QLHTMyDOkJ+eiN5e5V46RxIZ EPKgVX5SYp8L4sYQ8qR0HJsjgxNZzUSS4ccmt+hC2e7r4p/5L2CkeOFWArg4ZQX2 n27SUcy6RU/8X8YSjbS+w1zNue4uoU7JnTaMhE5GVOzhaHPTiHq78IL+QnkSUkUj m5z8iBp3w4QZ3FezP7Hj =C60y -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://github.com/openrisc/linux Pull OpenRISC update from Stafford Horne: "Just one change for 4.19: refactoring from Christoph Hellwig to use generic DMA facilities" * tag 'for-linus' of git://github.com/openrisc/linux: openrisc: use generic dma_noncoherent_ops openrisc: fix cache maintainance the the sync_single_for_device DMA operation openrisc: remove the no-op unmap_page and unmap_sg DMA operations openrisc: remove the sync_single_for_cpu DMA operation
This commit is contained in:
commit
2ab054fd1f
@ -6,6 +6,8 @@
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config OPENRISC
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config OPENRISC
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def_bool y
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def_bool y
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select DMA_NONCOHERENT_OPS
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select OF
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select OF
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select OF_EARLY_FLATTREE
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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select IRQ_DOMAIN
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@ -7,6 +7,7 @@ generic-y += current.h
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generic-y += device.h
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generic-y += device.h
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generic-y += div64.h
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generic-y += div64.h
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generic-y += dma.h
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generic-y += dma.h
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generic-y += dma-mapping.h
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generic-y += emergency-restart.h
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generic-y += emergency-restart.h
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generic-y += exec.h
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generic-y += exec.h
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generic-y += extable.h
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generic-y += extable.h
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@ -1,35 +0,0 @@
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/*
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* OpenRISC Linux
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* OpenRISC implementation:
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __ASM_OPENRISC_DMA_MAPPING_H
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#define __ASM_OPENRISC_DMA_MAPPING_H
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/*
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* See Documentation/DMA-API-HOWTO.txt and
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* Documentation/DMA-API.txt for documentation.
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*/
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#include <linux/dma-debug.h>
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#include <linux/dma-mapping.h>
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extern const struct dma_map_ops or1k_dma_map_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &or1k_dma_map_ops;
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}
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#endif /* __ASM_OPENRISC_DMA_MAPPING_H */
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@ -19,9 +19,7 @@
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* the only thing implemented properly. The rest need looking into...
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* the only thing implemented properly. The rest need looking into...
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*/
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*/
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#include <linux/dma-mapping.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <asm/cpuinfo.h>
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#include <asm/cpuinfo.h>
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#include <asm/spr_defs.h>
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#include <asm/spr_defs.h>
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@ -80,10 +78,9 @@ page_clear_nocache(pte_t *pte, unsigned long addr,
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* is being ignored for now; uncached but write-combined memory is a
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* is being ignored for now; uncached but write-combined memory is a
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* missing feature of the OR1K.
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* missing feature of the OR1K.
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*/
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*/
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static void *
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void *
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or1k_dma_alloc(struct device *dev, size_t size,
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arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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dma_addr_t *dma_handle, gfp_t gfp,
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gfp_t gfp, unsigned long attrs)
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unsigned long attrs)
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{
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{
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unsigned long va;
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unsigned long va;
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void *page;
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void *page;
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@ -115,9 +112,9 @@ or1k_dma_alloc(struct device *dev, size_t size,
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return (void *)va;
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return (void *)va;
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}
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}
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static void
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void
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or1k_dma_free(struct device *dev, size_t size, void *vaddr,
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arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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dma_addr_t dma_handle, unsigned long attrs)
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{
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{
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unsigned long va = (unsigned long)vaddr;
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unsigned long va = (unsigned long)vaddr;
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struct mm_walk walk = {
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struct mm_walk walk = {
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@ -133,19 +130,12 @@ or1k_dma_free(struct device *dev, size_t size, void *vaddr,
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free_pages_exact(vaddr, size);
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free_pages_exact(vaddr, size);
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}
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}
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static dma_addr_t
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t addr, size_t size,
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or1k_map_page(struct device *dev, struct page *page,
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enum dma_data_direction dir)
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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{
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unsigned long cl;
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unsigned long cl;
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dma_addr_t addr = page_to_phys(page) + offset;
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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return addr;
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switch (dir) {
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switch (dir) {
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case DMA_TO_DEVICE:
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case DMA_TO_DEVICE:
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/* Flush the dcache for the requested range */
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/* Flush the dcache for the requested range */
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@ -167,83 +157,4 @@ or1k_map_page(struct device *dev, struct page *page,
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*/
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*/
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break;
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break;
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}
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}
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return addr;
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}
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}
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static void
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or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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/* Nothing special to do here... */
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}
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static int
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or1k_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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s->dma_address = or1k_map_page(dev, sg_page(s), s->offset,
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s->length, dir, 0);
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}
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return nents;
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}
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static void
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or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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or1k_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, 0);
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}
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}
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static void
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or1k_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long cl;
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dma_addr_t addr = dma_handle;
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
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/* Invalidate the dcache for the requested range */
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for (cl = addr; cl < addr + size; cl += cpuinfo->dcache_block_size)
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mtspr(SPR_DCBIR, cl);
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}
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static void
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or1k_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long cl;
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dma_addr_t addr = dma_handle;
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struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()];
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/* Flush the dcache for the requested range */
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for (cl = addr; cl < addr + size; cl += cpuinfo->dcache_block_size)
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mtspr(SPR_DCBFR, cl);
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}
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const struct dma_map_ops or1k_dma_map_ops = {
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.alloc = or1k_dma_alloc,
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.free = or1k_dma_free,
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.map_page = or1k_map_page,
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.unmap_page = or1k_unmap_page,
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.map_sg = or1k_map_sg,
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.unmap_sg = or1k_unmap_sg,
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.sync_single_for_cpu = or1k_sync_single_for_cpu,
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.sync_single_for_device = or1k_sync_single_for_device,
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};
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EXPORT_SYMBOL(or1k_dma_map_ops);
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