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MIPS: Rewrite spinlocks to ticket locks.
Based on patch by Chad Reese of Cavium Networks. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
parent
b65a75b8c9
commit
2a31b03335
@ -610,11 +610,6 @@ source "arch/mips/vr41xx/Kconfig"
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endmenu
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config GENERIC_LOCKBREAK
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bool
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default y
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depends on SMP && PREEMPT
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config RWSEM_GENERIC_SPINLOCK
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bool
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default y
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@ -9,62 +9,125 @@
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#ifndef _ASM_SPINLOCK_H
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#define _ASM_SPINLOCK_H
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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#include <asm/war.h>
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/*
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* Your basic SMP spinlocks, allowing only a single CPU anywhere
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*/
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#define __raw_spin_is_locked(x) ((x)->lock != 0)
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#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
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#define __raw_spin_unlock_wait(x) \
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do { cpu_relax(); } while ((x)->lock)
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/*
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*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* We make no fairness assumptions. They have a cost.
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* These are fair FIFO ticket locks
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*
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* (the type definitions are in asm/spinlock_types.h)
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*/
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/*
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* Ticket locks are conceptually two parts, one indicating the current head of
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* the queue, and the other indicating the current tail. The lock is acquired
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* by atomically noting the tail and incrementing it by one (thus adding
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* ourself to the queue and noting our position), then waiting until the head
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* becomes equal to the the initial value of the tail.
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*/
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static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
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{
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unsigned int counters = ACCESS_ONCE(lock->lock);
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return ((counters >> 14) ^ counters) & 0x1fff;
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}
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#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
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#define __raw_spin_unlock_wait(x) \
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while (__raw_spin_is_locked(x)) { cpu_relax(); }
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static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
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{
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unsigned int counters = ACCESS_ONCE(lock->lock);
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return (((counters >> 14) - counters) & 0x1fff) > 1;
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}
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static inline void __raw_spin_lock(raw_spinlock_t *lock)
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{
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unsigned int tmp;
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int my_ticket;
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int tmp;
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__(
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" .set noreorder # __raw_spin_lock \n"
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"1: ll %1, %2 \n"
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" bnez %1, 1b \n"
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" li %1, 1 \n"
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" sc %1, %0 \n"
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" beqzl %1, 1b \n"
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" nop \n"
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" .set reorder \n"
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: "=m" (lock->lock), "=&r" (tmp)
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: "m" (lock->lock)
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: "memory");
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} else {
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__asm__ __volatile__(
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" .set noreorder # __raw_spin_lock \n"
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"1: ll %1, %2 \n"
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" bnez %1, 2f \n"
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" li %1, 1 \n"
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" sc %1, %0 \n"
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" beqz %1, 2f \n"
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__asm__ __volatile__ (
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" .set push # __raw_spin_lock \n"
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" .set noreorder \n"
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" \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" addiu %[my_ticket], %[ticket], 0x4000 \n"
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" sc %[my_ticket], %[ticket_ptr] \n"
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" beqzl %[my_ticket], 1b \n"
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" nop \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" bne %[ticket], %[my_ticket], 4f \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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"2: \n"
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" .subsection 2 \n"
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"2: ll %1, %2 \n"
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" bnez %1, 2b \n"
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" li %1, 1 \n"
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" b 1b \n"
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" nop \n"
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"4: andi %[ticket], %[ticket], 0x1fff \n"
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"5: sll %[ticket], 5 \n"
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" \n"
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"6: bnez %[ticket], 6b \n"
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" subu %[ticket], 1 \n"
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" \n"
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" lw %[ticket], %[ticket_ptr] \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" beq %[ticket], %[my_ticket], 2b \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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" b 5b \n"
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" subu %[ticket], %[ticket], 1 \n"
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" .previous \n"
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" .set reorder \n"
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: "=m" (lock->lock), "=&r" (tmp)
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: "m" (lock->lock)
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: "memory");
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (my_ticket));
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} else {
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__asm__ __volatile__ (
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" .set push # __raw_spin_lock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: addiu %[my_ticket], %[ticket], 0x4000 \n"
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" sc %[my_ticket], %[ticket_ptr] \n"
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" beqz %[my_ticket], 3f \n"
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" nop \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" bne %[ticket], %[my_ticket], 4f \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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"2: \n"
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" .subsection 2 \n"
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"3: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" \n"
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"4: andi %[ticket], %[ticket], 0x1fff \n"
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"5: sll %[ticket], 5 \n"
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" \n"
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"6: bnez %[ticket], 6b \n"
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" subu %[ticket], 1 \n"
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" \n"
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" lw %[ticket], %[ticket_ptr] \n"
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" andi %[ticket], %[ticket], 0x1fff \n"
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" beq %[ticket], %[my_ticket], 2b \n"
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" subu %[ticket], %[my_ticket], %[ticket] \n"
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" b 5b \n"
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" subu %[ticket], %[ticket], 1 \n"
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (my_ticket));
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}
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smp_llsc_mb();
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@ -72,55 +135,103 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
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static inline void __raw_spin_unlock(raw_spinlock_t *lock)
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{
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smp_mb();
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int tmp;
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__asm__ __volatile__(
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" .set noreorder # __raw_spin_unlock \n"
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" sw $0, %0 \n"
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" .set\treorder \n"
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: "=m" (lock->lock)
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: "m" (lock->lock)
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: "memory");
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smp_llsc_mb();
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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" # __raw_spin_unlock \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" addiu %[ticket], %[ticket], 1 \n"
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" ori %[ticket], %[ticket], 0x2000 \n"
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" xori %[ticket], %[ticket], 0x2000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqzl %[ticket], 2f \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp));
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} else {
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__asm__ __volatile__ (
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" .set push # __raw_spin_unlock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: addiu %[ticket], %[ticket], 1 \n"
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" ori %[ticket], %[ticket], 0x2000 \n"
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" xori %[ticket], %[ticket], 0x2000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqz %[ticket], 2f \n"
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" nop \n"
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" \n"
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" .subsection 2 \n"
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"2: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp));
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}
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}
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static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock)
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{
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unsigned int temp, res;
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int tmp, tmp2, tmp3;
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__(
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" .set noreorder # __raw_spin_trylock \n"
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"1: ll %0, %3 \n"
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" ori %2, %0, 1 \n"
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" sc %2, %1 \n"
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" beqzl %2, 1b \n"
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" nop \n"
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" andi %2, %0, 1 \n"
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" .set reorder"
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: "=&r" (temp), "=m" (lock->lock), "=&r" (res)
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: "m" (lock->lock)
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: "memory");
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} else {
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__asm__ __volatile__(
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" .set noreorder # __raw_spin_trylock \n"
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"1: ll %0, %3 \n"
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" ori %2, %0, 1 \n"
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" sc %2, %1 \n"
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" beqz %2, 2f \n"
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" andi %2, %0, 1 \n"
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__asm__ __volatile__ (
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" .set push # __raw_spin_trylock \n"
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" .set noreorder \n"
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" \n"
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"1: ll %[ticket], %[ticket_ptr] \n"
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" srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[now_serving], %[ticket], 0x1fff \n"
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" bne %[my_ticket], %[now_serving], 3f \n"
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" addiu %[ticket], %[ticket], 0x4000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqzl %[ticket], 1b \n"
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" li %[ticket], 1 \n"
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"2: \n"
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" .subsection 2 \n"
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"2: b 1b \n"
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" nop \n"
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"3: b 2b \n"
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" li %[ticket], 0 \n"
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" .previous \n"
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" .set reorder"
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: "=&r" (temp), "=m" (lock->lock), "=&r" (res)
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: "m" (lock->lock)
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: "memory");
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (tmp2),
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[now_serving] "=&r" (tmp3));
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} else {
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__asm__ __volatile__ (
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" .set push # __raw_spin_trylock \n"
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" .set noreorder \n"
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" \n"
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" ll %[ticket], %[ticket_ptr] \n"
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"1: srl %[my_ticket], %[ticket], 14 \n"
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" andi %[my_ticket], %[my_ticket], 0x1fff \n"
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" andi %[now_serving], %[ticket], 0x1fff \n"
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" bne %[my_ticket], %[now_serving], 3f \n"
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" addiu %[ticket], %[ticket], 0x4000 \n"
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" sc %[ticket], %[ticket_ptr] \n"
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" beqz %[ticket], 4f \n"
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" li %[ticket], 1 \n"
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"2: \n"
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" .subsection 2 \n"
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"3: b 2b \n"
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" li %[ticket], 0 \n"
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"4: b 1b \n"
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" ll %[ticket], %[ticket_ptr] \n"
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" .previous \n"
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" .set pop \n"
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: [ticket_ptr] "+m" (lock->lock),
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[ticket] "=&r" (tmp),
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[my_ticket] "=&r" (tmp2),
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[now_serving] "=&r" (tmp3));
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}
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smp_llsc_mb();
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return res == 0;
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return tmp;
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}
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/*
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@ -6,7 +6,12 @@
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#endif
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typedef struct {
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volatile unsigned int lock;
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/*
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* bits 0..13: serving_now
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* bits 14 : junk data
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* bits 15..28: ticket
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*/
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unsigned int lock;
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} raw_spinlock_t;
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#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
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