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xtensa: don't leave invalid TLB entry in fast_store_prohibited

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When fast_store_prohibited needs to go to the C-level exception handler
it leaves TLB entry that caused page fault in the TLB. If the faulting
task gets switched to a different CPU and completes page table update
there the TLB entry will get out of sync with the page table which may
cause a livelock on access to that page.
Invalidate faulting TLB entry on a slow path exit from the
fast_store_prohibited.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2022-04-23 03:52:23 -07:00
parent 5442b8c7dd
commit 2a26f4ee39
1 changed files with 5 additions and 1 deletions
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6
arch/xtensa/kernel/entry.S
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@ -1882,7 +1882,11 @@ ENTRY(fast_store_prohibited)
j 8b
2: /* If there was a problem, handle fault in C */
rsr a1, excvaddr
pdtlb a0, a1
bbci.l a0, DTLB_HIT_BIT, 1f
idtlb a0
1:
rsr a3, depc # still holds a2
s32i a3, a2, PT_AREG2
mov a1, a2