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Merge branch 'xgene-2nd-10gbe-port'

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Iyappan Subramanian says:

====================
driver: net: xgene: Enable 2nd 10GbE port on APM X-Gene SoC

This patch adds support for 2nd 10GbE on APM X-Gene SoC
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2015-09-15 12:47:47 -07:00
commit 29feb66a9a
4 changed files with 47 additions and 5 deletions
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28
arch/arm64/boot/dts/apm/apm-storm.dtsi
View File

@ -207,6 +207,17 @@
clock-output-names = "xge0clk";
};
xge1clk: xge1clk@1f62c000 {
compatible = "apm,xgene-device-clock";
status = "disabled";
#clock-cells = <1>;
clocks = <&socplldiv2 0>;
reg = <0x0 0x1f62c000 0x0 0x1000>;
reg-names = "csr-reg";
csr-mask = <0x3>;
clock-output-names = "xge1clk";
};
sataphy1clk: sataphy1clk@1f21c000 {
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
@ -816,6 +827,23 @@
phy-connection-type = "xgmii";
};
xgenet1: ethernet@1f620000 {
compatible = "apm,xgene1-xgenet";
status = "disabled";
reg = <0x0 0x1f620000 0x0 0xd100>,
<0x0 0x1f600000 0x0 0Xc300>,
<0x0 0x18000000 0x0 0X8000>;
reg-names = "enet_csr", "ring_csr", "ring_cmd";
interrupts = <0x0 0x6C 0x4>,
<0x0 0x6D 0x4>;
port-id = <1>;
dma-coherent;
clocks = <&xge1clk 0>;
/* mac address will be overwritten by the bootloader */
local-mac-address = [00 00 00 00 00 00];
phy-connection-type = "xgmii";
};
rng: rng@10520000 {
compatible = "apm,xgene-rng";
reg = <0x0 0x10520000 0x0 0x100>;

3
drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
View File

@ -107,7 +107,8 @@ static void xgene_enet_set_ring_state(struct xgene_enet_desc_ring *ring)
{
xgene_enet_ring_set_type(ring);
if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0)
if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0 ||
xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH1)
xgene_enet_ring_set_recombbuf(ring);
xgene_enet_ring_init(ring);

16
drivers/net/ethernet/apm/xgene/xgene_enet_main.c
View File

@ -1305,10 +1305,17 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
pdata->ring_num = START_RING_NUM_0;
break;
case 1:
pdata->cpu_bufnum = START_CPU_BUFNUM_1;
pdata->eth_bufnum = START_ETH_BUFNUM_1;
pdata->bp_bufnum = START_BP_BUFNUM_1;
pdata->ring_num = START_RING_NUM_1;
if (pdata->phy_mode == PHY_INTERFACE_MODE_XGMII) {
pdata->cpu_bufnum = XG_START_CPU_BUFNUM_1;
pdata->eth_bufnum = XG_START_ETH_BUFNUM_1;
pdata->bp_bufnum = XG_START_BP_BUFNUM_1;
pdata->ring_num = XG_START_RING_NUM_1;
} else {
pdata->cpu_bufnum = START_CPU_BUFNUM_1;
pdata->eth_bufnum = START_ETH_BUFNUM_1;
pdata->bp_bufnum = START_BP_BUFNUM_1;
pdata->ring_num = START_RING_NUM_1;
}
break;
default:
break;
@ -1478,6 +1485,7 @@ static const struct acpi_device_id xgene_enet_acpi_match[] = {
{ "APMC0D05", XGENE_ENET1},
{ "APMC0D30", XGENE_ENET1},
{ "APMC0D31", XGENE_ENET1},
{ "APMC0D3F", XGENE_ENET1},
{ "APMC0D26", XGENE_ENET2},
{ "APMC0D25", XGENE_ENET2},
{ }

5
drivers/net/ethernet/apm/xgene/xgene_enet_main.h
View File

@ -56,6 +56,11 @@
#define START_BP_BUFNUM_1 0x2A
#define START_RING_NUM_1 264
#define XG_START_CPU_BUFNUM_1 12
#define XG_START_ETH_BUFNUM_1 2
#define XG_START_BP_BUFNUM_1 0x22
#define XG_START_RING_NUM_1 264
#define X2_START_CPU_BUFNUM_0 0
#define X2_START_ETH_BUFNUM_0 0
#define X2_START_BP_BUFNUM_0 0x20