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arm64: dts: imx8mp: Add MEDIA_BLK_CTRL
Add a DT node for the MEDIA_BLK_CTRL, which provides power domains for the camera and display devices. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -1025,6 +1025,44 @@
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#size-cells = <1>;
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ranges;
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media_blk_ctrl: blk-ctrl@32ec0000 {
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compatible = "fsl,imx8mp-media-blk-ctrl",
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"syscon";
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reg = <0x32ec0000 0x10000>;
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power-domains = <&pgc_mediamix>,
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<&pgc_mipi_phy1>,
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<&pgc_mipi_phy1>,
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<&pgc_mediamix>,
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<&pgc_mediamix>,
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<&pgc_mipi_phy2>,
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<&pgc_mediamix>,
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<&pgc_ispdwp>,
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<&pgc_ispdwp>,
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<&pgc_mipi_phy2>;
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power-domain-names = "bus", "mipi-dsi1", "mipi-csi1",
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"lcdif1", "isi", "mipi-csi2",
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"lcdif2", "isp", "dwe",
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"mipi-dsi2";
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clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_ISP_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>;
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clock-names = "apb", "axi", "cam1", "cam2",
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"disp1", "disp2", "isp", "phy";
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
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<&clk IMX8MP_CLK_MEDIA_APB>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
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<&clk IMX8MP_SYS_PLL1_800M>;
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assigned-clock-rates = <500000000>, <200000000>;
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#power-domain-cells = <1>;
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};
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hsio_blk_ctrl: blk-ctrl@32f10000 {
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compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
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reg = <0x32f10000 0x24>;
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