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dmaengine: Add consumer for the new DMA_MEMCPY_SG API function.
This new CDMA binding for device_prep_dma_memcpy_sg was partially borrowed from xlnx kernel tree, an expanded with extended address space support when linking descriptor segments and checking for incorrect zero transfer size. Signed-off-by: Adrian Larumbe <adrianml@alumnos.upm.es> Link: https://lore.kernel.org/r/20211101180825.241048-4-adrianml@alumnos.upm.es Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -2127,6 +2127,126 @@ error:
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return NULL;
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}
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/**
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* xilinx_cdma_prep_memcpy_sg - prepare descriptors for a memcpy_sg transaction
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* @dchan: DMA channel
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* @dst_sg: Destination scatter list
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* @dst_sg_len: Number of entries in destination scatter list
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* @src_sg: Source scatter list
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* @src_sg_len: Number of entries in source scatter list
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* @flags: transfer ack flags
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*
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* Return: Async transaction descriptor on success and NULL on failure
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*/
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static struct dma_async_tx_descriptor *xilinx_cdma_prep_memcpy_sg(
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struct dma_chan *dchan, struct scatterlist *dst_sg,
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unsigned int dst_sg_len, struct scatterlist *src_sg,
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unsigned int src_sg_len, unsigned long flags)
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{
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struct xilinx_dma_chan *chan = to_xilinx_chan(dchan);
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struct xilinx_dma_tx_descriptor *desc;
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struct xilinx_cdma_tx_segment *segment, *prev = NULL;
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struct xilinx_cdma_desc_hw *hw;
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size_t len, dst_avail, src_avail;
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dma_addr_t dma_dst, dma_src;
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if (unlikely(dst_sg_len == 0 || src_sg_len == 0))
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return NULL;
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if (unlikely(!dst_sg || !src_sg))
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return NULL;
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desc = xilinx_dma_alloc_tx_descriptor(chan);
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if (!desc)
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return NULL;
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dma_async_tx_descriptor_init(&desc->async_tx, &chan->common);
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desc->async_tx.tx_submit = xilinx_dma_tx_submit;
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dst_avail = sg_dma_len(dst_sg);
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src_avail = sg_dma_len(src_sg);
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/*
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* loop until there is either no more source or no more destination
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* scatterlist entry
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*/
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while (true) {
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len = min_t(size_t, src_avail, dst_avail);
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len = min_t(size_t, len, chan->xdev->max_buffer_len);
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if (len == 0)
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goto fetch;
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/* Allocate the link descriptor from DMA pool */
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segment = xilinx_cdma_alloc_tx_segment(chan);
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if (!segment)
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goto error;
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dma_dst = sg_dma_address(dst_sg) + sg_dma_len(dst_sg) -
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dst_avail;
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dma_src = sg_dma_address(src_sg) + sg_dma_len(src_sg) -
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src_avail;
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hw = &segment->hw;
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hw->control = len;
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hw->src_addr = dma_src;
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hw->dest_addr = dma_dst;
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if (chan->ext_addr) {
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hw->src_addr_msb = upper_32_bits(dma_src);
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hw->dest_addr_msb = upper_32_bits(dma_dst);
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}
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if (prev) {
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prev->hw.next_desc = segment->phys;
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if (chan->ext_addr)
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prev->hw.next_desc_msb =
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upper_32_bits(segment->phys);
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}
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prev = segment;
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dst_avail -= len;
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src_avail -= len;
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list_add_tail(&segment->node, &desc->segments);
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fetch:
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/* Fetch the next dst scatterlist entry */
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if (dst_avail == 0) {
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if (dst_sg_len == 0)
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break;
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dst_sg = sg_next(dst_sg);
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if (dst_sg == NULL)
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break;
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dst_sg_len--;
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dst_avail = sg_dma_len(dst_sg);
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}
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/* Fetch the next src scatterlist entry */
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if (src_avail == 0) {
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if (src_sg_len == 0)
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break;
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src_sg = sg_next(src_sg);
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if (src_sg == NULL)
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break;
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src_sg_len--;
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src_avail = sg_dma_len(src_sg);
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}
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}
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if (list_empty(&desc->segments)) {
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dev_err(chan->xdev->dev,
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"%s: Zero-size SG transfer requested\n", __func__);
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goto error;
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}
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/* Link the last hardware descriptor with the first. */
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segment = list_first_entry(&desc->segments,
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struct xilinx_cdma_tx_segment, node);
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desc->async_tx.phys = segment->phys;
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prev->hw.next_desc = segment->phys;
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return &desc->async_tx;
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error:
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xilinx_dma_free_tx_descriptor(chan, desc);
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return NULL;
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}
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/**
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* xilinx_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction
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* @dchan: DMA channel
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@ -3115,7 +3235,9 @@ static int xilinx_dma_probe(struct platform_device *pdev)
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DMA_RESIDUE_GRANULARITY_SEGMENT;
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} else if (xdev->dma_config->dmatype == XDMA_TYPE_CDMA) {
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dma_cap_set(DMA_MEMCPY, xdev->common.cap_mask);
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dma_cap_set(DMA_MEMCPY_SG, xdev->common.cap_mask);
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xdev->common.device_prep_dma_memcpy = xilinx_cdma_prep_memcpy;
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xdev->common.device_prep_dma_memcpy_sg = xilinx_cdma_prep_memcpy_sg;
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/* Residue calculation is supported by only AXI DMA and CDMA */
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xdev->common.residue_granularity =
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DMA_RESIDUE_GRANULARITY_SEGMENT;
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