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Merge master.kernel.org:/home/rmk/linux-2.6-arm
This commit is contained in:
Linus Torvalds
commit
29ac878a71
@ -1,7 +1,7 @@
|
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Kernel Memory Layout on ARM Linux
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||||
|
||||
Russell King <rmk@arm.linux.org.uk>
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May 21, 2004 (2.6.6)
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November 17, 2005 (2.6.15)
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This document describes the virtual memory layout which the Linux
|
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kernel uses for ARM processors. It indicates which regions are
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@ -37,6 +37,8 @@ ff000000 ffbfffff Reserved for future expansion of DMA
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mapping region.
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VMALLOC_END feffffff Free for platform use, recommended.
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VMALLOC_END must be aligned to a 2MB
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boundary.
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VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
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Memory returned by vmalloc/ioremap will
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@ -120,7 +120,6 @@ EXPORT_SYMBOL(__arch_strncpy_from_user);
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EXPORT_SYMBOL(__get_user_1);
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EXPORT_SYMBOL(__get_user_2);
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EXPORT_SYMBOL(__get_user_4);
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EXPORT_SYMBOL(__get_user_8);
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EXPORT_SYMBOL(__put_user_1);
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EXPORT_SYMBOL(__put_user_2);
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@ -48,8 +48,7 @@ work_pending:
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mov r0, sp @ 'regs'
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mov r2, why @ 'syscall'
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bl do_notify_resume
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disable_irq @ disable interrupts
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b no_work_pending
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b ret_slow_syscall @ Check work again
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work_resched:
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bl schedule
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@ -595,23 +595,22 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
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*/
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ret |= !valid_user_regs(regs);
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/*
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* Block the signal if we were unsuccessful.
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*/
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if (ret != 0) {
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spin_lock_irq(&tsk->sighand->siglock);
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sigorsets(&tsk->blocked, &tsk->blocked,
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&ka->sa.sa_mask);
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if (!(ka->sa.sa_flags & SA_NODEFER))
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sigaddset(&tsk->blocked, sig);
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recalc_sigpending();
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spin_unlock_irq(&tsk->sighand->siglock);
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force_sigsegv(sig, tsk);
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return;
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}
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if (ret == 0)
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return;
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/*
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* Block the signal if we were successful.
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*/
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spin_lock_irq(&tsk->sighand->siglock);
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sigorsets(&tsk->blocked, &tsk->blocked,
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&ka->sa.sa_mask);
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if (!(ka->sa.sa_flags & SA_NODEFER))
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sigaddset(&tsk->blocked, sig);
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recalc_sigpending();
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spin_unlock_irq(&tsk->sighand->siglock);
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force_sigsegv(sig, tsk);
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}
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/*
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@ -172,6 +172,10 @@ SECTIONS
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.comment 0 : { *(.comment) }
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}
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/* those must never be empty */
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/*
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* These must never be empty
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* If you have to comment these two assert statements out, your
|
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* binutils is too old (for other reasons as well)
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*/
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ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
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ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
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@ -54,15 +54,6 @@ __get_user_4:
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mov r0, #0
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mov pc, lr
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.global __get_user_8
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__get_user_8:
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5: ldrt r2, [r0], #4
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6: ldrt r3, [r0]
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mov r0, #0
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mov pc, lr
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|
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__get_user_bad_8:
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mov r3, #0
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__get_user_bad:
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mov r2, #0
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mov r0, #-EFAULT
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@ -73,6 +64,4 @@ __get_user_bad:
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.long 2b, __get_user_bad
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.long 3b, __get_user_bad
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.long 4b, __get_user_bad
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.long 5b, __get_user_bad_8
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.long 6b, __get_user_bad_8
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.previous
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@ -51,4 +51,4 @@ obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o
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obj-$(CONFIG_CPU_SA110) += proc-sa110.o
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obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
|
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obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
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obj-$(CONFIG_CPU_V6) += proc-v6.o blockops.o
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obj-$(CONFIG_CPU_V6) += proc-v6.o
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@ -1,185 +0,0 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <asm/memory.h>
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#include <asm/ptrace.h>
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#include <asm/cacheflush.h>
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#include <asm/traps.h>
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extern struct cpu_cache_fns blk_cache_fns;
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#define HARVARD_CACHE
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|
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/*
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* blk_flush_kern_dcache_page(kaddr)
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*
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* Ensure that the data held in the page kaddr is written back
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* to the page in question.
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*
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* - kaddr - kernel address (guaranteed to be page aligned)
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*/
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static void __attribute__((naked))
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blk_flush_kern_dcache_page(void *kaddr)
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{
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asm(
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"add r1, r0, %0 \n\
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sub r1, r1, %1 \n\
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1: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
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mov r0, #0 \n\
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mcr p15, 0, r0, c7, c5, 0 \n\
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mcr p15, 0, r0, c7, c10, 4 \n\
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mov pc, lr"
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:
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: "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
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}
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/*
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* blk_dma_inv_range(start,end)
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*
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* Invalidate the data cache within the specified region; we will
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* be performing a DMA operation in this region and we want to
|
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* purge old data in the cache.
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*
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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static void __attribute__((naked))
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blk_dma_inv_range_unified(unsigned long start, unsigned long end)
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{
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asm(
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"tst r0, %0 \n\
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mcrne p15, 0, r0, c7, c11, 1 @ clean unified line \n\
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tst r1, %0 \n\
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mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line\n\
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.word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
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mov r0, #0 \n\
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
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mov pc, lr"
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:
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: "I" (L1_CACHE_BYTES - 1));
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}
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static void __attribute__((naked))
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blk_dma_inv_range_harvard(unsigned long start, unsigned long end)
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{
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asm(
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"tst r0, %0 \n\
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mcrne p15, 0, r0, c7, c10, 1 @ clean D line \n\
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tst r1, %0 \n\
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mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line \n\
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.word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
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mov r0, #0 \n\
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
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mov pc, lr"
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:
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: "I" (L1_CACHE_BYTES - 1));
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}
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/*
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* blk_dma_clean_range(start,end)
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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static void __attribute__((naked))
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blk_dma_clean_range(unsigned long start, unsigned long end)
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{
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asm(
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".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0 @ blocking \n\
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mov r0, #0 \n\
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
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mov pc, lr");
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}
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/*
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* blk_dma_flush_range(start,end)
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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static void __attribute__((naked))
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blk_dma_flush_range(unsigned long start, unsigned long end)
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{
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asm(
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".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0 @ blocking \n\
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mov pc, lr");
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}
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|
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static int blockops_trap(struct pt_regs *regs, unsigned int instr)
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{
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regs->ARM_r4 |= regs->ARM_r2;
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regs->ARM_pc += 4;
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return 0;
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}
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|
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static char *func[] = {
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"Prefetch data range",
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"Clean+Invalidate data range",
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"Clean data range",
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"Invalidate data range",
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"Invalidate instr range"
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};
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static struct undef_hook blockops_hook __initdata = {
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.instr_mask = 0x0fffffd0,
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.instr_val = 0x0c401f00,
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.cpsr_mask = PSR_T_BIT,
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.cpsr_val = 0,
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.fn = blockops_trap,
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};
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static int __init blockops_check(void)
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{
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register unsigned int err asm("r4") = 0;
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unsigned int err_pos = 1;
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unsigned int cache_type;
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int i;
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asm("mrc p15, 0, %0, c0, c0, 1" : "=r" (cache_type));
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printk("Checking V6 block cache operations:\n");
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register_undef_hook(&blockops_hook);
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__asm__ ("mov r0, %0\n\t"
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"mov r1, %1\n\t"
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"mov r2, #1\n\t"
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".word 0xec401f2c @ mcrr p15, 0, r1, r0, c12, 2\n\t"
|
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"mov r2, #2\n\t"
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".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0\n\t"
|
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"mov r2, #4\n\t"
|
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".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0\n\t"
|
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"mov r2, #8\n\t"
|
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".word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0\n\t"
|
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"mov r2, #16\n\t"
|
||||
".word 0xec401f05 @ mcrr p15, 0, r1, r0, c5, 0\n\t"
|
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:
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: "r" (PAGE_OFFSET), "r" (PAGE_OFFSET + 128)
|
||||
: "r0", "r1", "r2");
|
||||
|
||||
unregister_undef_hook(&blockops_hook);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
|
||||
printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
|
||||
|
||||
if ((err & 8) == 0) {
|
||||
printk(" --> Using %s block cache invalidate\n",
|
||||
cache_type & (1 << 24) ? "harvard" : "unified");
|
||||
if (cache_type & (1 << 24))
|
||||
cpu_cache.dma_inv_range = blk_dma_inv_range_harvard;
|
||||
else
|
||||
cpu_cache.dma_inv_range = blk_dma_inv_range_unified;
|
||||
}
|
||||
if ((err & 4) == 0) {
|
||||
printk(" --> Using block cache clean\n");
|
||||
cpu_cache.dma_clean_range = blk_dma_clean_range;
|
||||
}
|
||||
if ((err & 2) == 0) {
|
||||
printk(" --> Using block cache clean+invalidate\n");
|
||||
cpu_cache.dma_flush_range = blk_dma_flush_range;
|
||||
cpu_cache.flush_kern_dcache_page = blk_flush_kern_dcache_page;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__initcall(blockops_check);
|
||||
@ -420,7 +420,8 @@ static void __init bootmem_init(struct meminfo *mi)
|
||||
* Set up device the mappings. Since we clear out the page tables for all
|
||||
* mappings above VMALLOC_END, we will remove any debug device mappings.
|
||||
* This means you have to be careful how you debug this function, or any
|
||||
* called function. (Do it by code inspection!)
|
||||
* called function. This means you can't use any function or debugging
|
||||
* method which may touch any device, otherwise the kernel _will_ crash.
|
||||
*/
|
||||
static void __init devicemaps_init(struct machine_desc *mdesc)
|
||||
{
|
||||
@ -428,6 +429,12 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
|
||||
unsigned long addr;
|
||||
void *vectors;
|
||||
|
||||
/*
|
||||
* Allocate the vector page early.
|
||||
*/
|
||||
vectors = alloc_bootmem_low_pages(PAGE_SIZE);
|
||||
BUG_ON(!vectors);
|
||||
|
||||
for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
|
||||
pmd_clear(pmd_off_k(addr));
|
||||
|
||||
@ -461,12 +468,6 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
|
||||
create_mapping(&map);
|
||||
#endif
|
||||
|
||||
flush_cache_all();
|
||||
local_flush_tlb_all();
|
||||
|
||||
vectors = alloc_bootmem_low_pages(PAGE_SIZE);
|
||||
BUG_ON(!vectors);
|
||||
|
||||
/*
|
||||
* Create a mapping for the machine vectors at the high-vectors
|
||||
* location (0xffff0000). If we aren't using high-vectors, also
|
||||
@ -491,12 +492,13 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
|
||||
mdesc->map_io();
|
||||
|
||||
/*
|
||||
* Finally flush the tlb again - this ensures that we're in a
|
||||
* consistent state wrt the writebuffer if the writebuffer needs
|
||||
* draining. After this point, we can start to touch devices
|
||||
* again.
|
||||
* Finally flush the caches and tlb to ensure that we're in a
|
||||
* consistent state wrt the writebuffer. This also ensures that
|
||||
* any write-allocated cache lines in the vector page are written
|
||||
* back. After this point, we can start to touch devices again.
|
||||
*/
|
||||
local_flush_tlb_all();
|
||||
flush_cache_all();
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
|
||||
* mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
|
||||
*/
|
||||
void __iomem *
|
||||
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags,
|
||||
unsigned long align)
|
||||
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags)
|
||||
{
|
||||
void * addr;
|
||||
struct vm_struct * area;
|
||||
|
||||
@ -246,7 +246,7 @@ int __init ipaq_mtd_init(void)
|
||||
ipaq_map[i].size = h3xxx_max_flash_size;
|
||||
ipaq_map[i].set_vpp = h3xxx_set_vpp;
|
||||
ipaq_map[i].phys = cs_phys[i];
|
||||
ipaq_map[i].virt = __ioremap(cs_phys[i], 0x04000000, 0, 1);
|
||||
ipaq_map[i].virt = ioremap(cs_phys[i], 0x04000000);
|
||||
if (machine_is_h3100 () || machine_is_h1900())
|
||||
ipaq_map[i].bankwidth = 2;
|
||||
}
|
||||
@ -280,7 +280,7 @@ int __init ipaq_mtd_init(void)
|
||||
nb_parts = ARRAY_SIZE(jornada_partitions);
|
||||
ipaq_map[0].size = jornada_max_flash_size;
|
||||
ipaq_map[0].set_vpp = jornada56x_set_vpp;
|
||||
ipaq_map[0].virt = (__u32)__ioremap(0x0, 0x04000000, 0, 1);
|
||||
ipaq_map[0].virt = (__u32)ioremap(0x0, 0x04000000);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_SA1100_JORNADA720
|
||||
@ -442,7 +442,7 @@ static int __init h1900_special_case(void)
|
||||
ipaq_map[0].size = 0x80000;
|
||||
ipaq_map[0].set_vpp = h3xxx_set_vpp;
|
||||
ipaq_map[0].phys = 0x0;
|
||||
ipaq_map[0].virt = __ioremap(0x0, 0x04000000, 0, 1);
|
||||
ipaq_map[0].virt = ioremap(0x0, 0x04000000);
|
||||
ipaq_map[0].bankwidth = 2;
|
||||
|
||||
printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with JEDEC.\n", ipaq_map[0].bankwidth*8, ipaq_map[0].virt);
|
||||
|
||||
@ -112,7 +112,7 @@ static int __init h1910_init (void)
|
||||
if (!machine_is_h1900())
|
||||
return -ENODEV;
|
||||
|
||||
nandaddr = __ioremap(0x08000000, 0x1000, 0, 1);
|
||||
nandaddr = ioremap(0x08000000, 0x1000);
|
||||
if (!nandaddr) {
|
||||
printk("Failed to ioremap nand flash.\n");
|
||||
return -ENOMEM;
|
||||
|
||||
@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
|
||||
* fallback to the default.
|
||||
*/
|
||||
static inline void __iomem *
|
||||
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
|
||||
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
|
||||
{
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
|
||||
if((addr < 0x48000000) || (addr > 0x4fffffff))
|
||||
return __ioremap(addr, size, flags, align);
|
||||
return __ioremap(addr, size, flags);
|
||||
|
||||
return (void *)addr;
|
||||
}
|
||||
@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
|
||||
static inline void
|
||||
__ixp4xx_iounmap(void __iomem *addr)
|
||||
{
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
if ((u32)addr >= VMALLOC_START)
|
||||
__iounmap(addr);
|
||||
}
|
||||
|
||||
#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
|
||||
#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
|
||||
#define __arch_iounmap(a) __ixp4xx_iounmap(a)
|
||||
|
||||
#define writeb(v, p) __ixp4xx_writeb(v, p)
|
||||
|
||||
@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
|
||||
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
|
||||
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
|
||||
|
||||
/*
|
||||
* Architecture ioremap implementation.
|
||||
*/
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
/*
|
||||
* Bad read/write accesses...
|
||||
*/
|
||||
@ -256,18 +262,15 @@ out:
|
||||
* ioremap takes a PCI memory address, as specified in
|
||||
* Documentation/IO-mapping.txt.
|
||||
*/
|
||||
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
|
||||
extern void __iounmap(void __iomem *addr);
|
||||
|
||||
#ifndef __arch_ioremap
|
||||
#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
|
||||
#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)
|
||||
#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1)
|
||||
#define ioremap(cookie,size) __ioremap(cookie,size,0)
|
||||
#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
|
||||
#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
|
||||
#define iounmap(cookie) __iounmap(cookie)
|
||||
#else
|
||||
#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)
|
||||
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)
|
||||
#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
|
||||
#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
|
||||
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
|
||||
#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
|
||||
#define iounmap(cookie) __arch_iounmap(cookie)
|
||||
#endif
|
||||
|
||||
|
||||
@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
|
||||
extern int __get_user_1(void *);
|
||||
extern int __get_user_2(void *);
|
||||
extern int __get_user_4(void *);
|
||||
extern int __get_user_8(void *);
|
||||
extern int __get_user_bad(void);
|
||||
|
||||
#define __get_user_x(__r2,__p,__e,__s,__i...) \
|
||||
@ -114,7 +113,7 @@ extern int __get_user_bad(void);
|
||||
#define get_user(x,p) \
|
||||
({ \
|
||||
const register typeof(*(p)) __user *__p asm("r0") = (p);\
|
||||
register typeof(*(p)) __r2 asm("r2"); \
|
||||
register unsigned int __r2 asm("r2"); \
|
||||
register int __e asm("r0"); \
|
||||
switch (sizeof(*(__p))) { \
|
||||
case 1: \
|
||||
@ -126,12 +125,9 @@ extern int __get_user_bad(void);
|
||||
case 4: \
|
||||
__get_user_x(__r2, __p, __e, 4, "lr"); \
|
||||
break; \
|
||||
case 8: \
|
||||
__get_user_x(__r2, __p, __e, 8, "lr"); \
|
||||
break; \
|
||||
default: __e = __get_user_bad(); break; \
|
||||
} \
|
||||
x = __r2; \
|
||||
x = (typeof(*(p))) __r2; \
|
||||
__e; \
|
||||
})
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user