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PCI: Remove pci_resource_bar() and pci_iov_resource_bar()
pci_std_update_resource() only deals with standard BARs, so we don't have to worry about the complications of VF BARs in an SR-IOV capability. Compute the BAR address inline and remove pci_resource_bar(). That makes pci_iov_resource_bar() unused, so remove that as well. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
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@ -553,24 +553,6 @@ void pci_iov_release(struct pci_dev *dev)
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sriov_release(dev);
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}
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/**
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* pci_iov_resource_bar - get position of the SR-IOV BAR
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* @dev: the PCI device
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* @resno: the resource number
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*
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* Returns position of the BAR encapsulated in the SR-IOV capability.
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*/
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int pci_iov_resource_bar(struct pci_dev *dev, int resno)
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{
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if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
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return 0;
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BUG_ON(!dev->is_physfn);
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return dev->sriov->pos + PCI_SRIOV_BAR +
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4 * (resno - PCI_IOV_RESOURCES);
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}
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/**
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* pci_iov_update_resource - update a VF BAR
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* @dev: the PCI device
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@ -4827,36 +4827,6 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags)
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}
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EXPORT_SYMBOL(pci_select_bars);
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/**
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* pci_resource_bar - get position of the BAR associated with a resource
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* @dev: the PCI device
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* @resno: the resource number
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* @type: the BAR type to be filled in
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*
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* Returns BAR position in config space, or 0 if the BAR is invalid.
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*/
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int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
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{
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int reg;
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if (resno < PCI_ROM_RESOURCE) {
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*type = pci_bar_unknown;
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return PCI_BASE_ADDRESS_0 + 4 * resno;
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} else if (resno == PCI_ROM_RESOURCE) {
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*type = pci_bar_mem32;
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return dev->rom_base_reg;
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} else if (resno < PCI_BRIDGE_RESOURCES) {
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/* device specific resource */
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*type = pci_bar_unknown;
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reg = pci_iov_resource_bar(dev, resno);
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if (reg)
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return reg;
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}
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dev_err(&dev->dev, "BAR %d: invalid resource\n", resno);
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return 0;
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}
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/* Some architectures require additional programming to enable VGA */
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static arch_set_vga_state_t arch_set_vga_state;
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@ -245,7 +245,6 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
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int pci_setup_device(struct pci_dev *dev);
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int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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struct resource *res, unsigned int reg);
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int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type);
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void pci_configure_ari(struct pci_dev *dev);
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void __pci_bus_size_bridges(struct pci_bus *bus,
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struct list_head *realloc_head);
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@ -289,7 +288,6 @@ static inline void pci_restore_ats_state(struct pci_dev *dev)
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#ifdef CONFIG_PCI_IOV
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int pci_iov_init(struct pci_dev *dev);
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void pci_iov_release(struct pci_dev *dev);
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int pci_iov_resource_bar(struct pci_dev *dev, int resno);
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void pci_iov_update_resource(struct pci_dev *dev, int resno);
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resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
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void pci_restore_iov_state(struct pci_dev *dev);
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@ -304,10 +302,6 @@ static inline void pci_iov_release(struct pci_dev *dev)
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{
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}
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static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno)
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{
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return 0;
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}
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static inline void pci_restore_iov_state(struct pci_dev *dev)
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{
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}
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@ -32,7 +32,6 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno)
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u16 cmd;
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u32 new, check, mask;
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int reg;
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enum pci_bar_type type;
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struct resource *res = dev->resource + resno;
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/* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */
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@ -70,14 +69,16 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno)
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new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
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}
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reg = pci_resource_bar(dev, resno, &type);
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if (!reg)
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return;
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if (type != pci_bar_unknown) {
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if (resno < PCI_ROM_RESOURCE) {
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reg = PCI_BASE_ADDRESS_0 + 4 * resno;
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} else if (resno == PCI_ROM_RESOURCE) {
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if (!(res->flags & IORESOURCE_ROM_ENABLE))
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return;
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reg = dev->rom_base_reg;
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new |= PCI_ROM_ADDRESS_ENABLE;
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}
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} else
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return;
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/*
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* We can't update a 64-bit BAR atomically, so when possible,
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