korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-25 03:55:09 +08:00
Code Issues Packages Projects Releases Wiki Activity

drm/nouveau/kms/nv50-: wrap existing command submission in nvif_push interface

Browse Source 
This commit pulls in a bunch of new push buffer macros which are able to
support NVIDIA's class headers, and provide more useful debug output and
error checking (compile-time, where possible) than we had previously.

Will incrementally transition each function over to the unified interfaces.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-06-20 07:52:26 +10:00
parent 3e176fd060
commit 2853ccf092
5 changed files with 614 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/drm/nouveau/Kconfig
View File

@ -76,6 +76,14 @@ config NOUVEAU_DEBUG_MMU
help help
Say Y here if you want to enable verbose MMU debug output. Say Y here if you want to enable verbose MMU debug output.
config NOUVEAU_DEBUG_PUSH
bool "Enable additional push buffer debugging"
depends on DRM_NOUVEAU
default n
help
Say Y here if you want to enable verbose push buffer debug output
and sanity checks.
config DRM_NOUVEAU_BACKLIGHT config DRM_NOUVEAU_BACKLIGHT
bool "Support for backlight control" bool "Support for backlight control"
depends on DRM_NOUVEAU depends on DRM_NOUVEAU

42
drivers/gpu/drm/nouveau/dispnv50/disp.c
View File

@ -113,7 +113,29 @@ nv50_dmac_destroy(struct nv50_dmac *dmac)
nv50_chan_destroy(&dmac->base); nv50_chan_destroy(&dmac->base);
nvif_mem_dtor(&dmac->push); nvif_mem_dtor(&dmac->_push.mem);
}
static void
nv50_dmac_kick(struct nvif_push *push)
{
struct nv50_dmac *dmac = container_of(push, typeof(*dmac), _push);
evo_kick(push->cur, dmac);
push->bgn = push->cur = push->end;
}
static int
nv50_dmac_wait(struct nvif_push *push, u32 size)
{
struct nv50_dmac *dmac = container_of(push, typeof(*dmac), _push);
u32 *ptr = evo_wait(dmac, size);
if (!ptr)
return -ETIMEDOUT;
push->bgn = ptr;
push->cur = ptr;
push->end = ptr + size;
return 0;
} }
int int
@ -141,13 +163,16 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
type |= NVIF_MEM_VRAM; type |= NVIF_MEM_VRAM;
ret = nvif_mem_ctor_map(&cli->mmu, "kmsChanPush", type, 0x1000, ret = nvif_mem_ctor_map(&cli->mmu, "kmsChanPush", type, 0x1000,
&dmac->push); &dmac->_push.mem);
if (ret) if (ret)
return ret; return ret;
dmac->ptr = dmac->push.object.map.ptr; dmac->ptr = dmac->_push.mem.object.map.ptr;
dmac->_push.wait = nv50_dmac_wait;
dmac->_push.kick = nv50_dmac_kick;
dmac->push = &dmac->_push;
args->pushbuf = nvif_handle(&dmac->push.object); args->pushbuf = nvif_handle(&dmac->_push.mem.object);
ret = nv50_chan_create(device, disp, oclass, head, data, size, ret = nv50_chan_create(device, disp, oclass, head, data, size,
&dmac->base); &dmac->base);
@ -193,7 +218,7 @@ evo_flush(struct nv50_dmac *dmac)
/* Push buffer fetches are not coherent with BAR1, we need to ensure /* Push buffer fetches are not coherent with BAR1, we need to ensure
* writes have been flushed right through to VRAM before writing PUT. * writes have been flushed right through to VRAM before writing PUT.
*/ */
if (dmac->push.type & NVIF_MEM_VRAM) { if (dmac->push->mem.type & NVIF_MEM_VRAM) {
struct nvif_device *device = dmac->base.device; struct nvif_device *device = dmac->base.device;
nvif_wr32(&device->object, 0x070000, 0x00000001); nvif_wr32(&device->object, 0x070000, 0x00000001);
nvif_msec(device, 2000, nvif_msec(device, 2000,
@ -208,7 +233,12 @@ evo_wait(struct nv50_dmac *evoc, int nr)
{ {
struct nv50_dmac *dmac = evoc; struct nv50_dmac *dmac = evoc;
struct nvif_device *device = dmac->base.device; struct nvif_device *device = dmac->base.device;
u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4; u32 put;
if (dmac->push->cur != dmac->push->bgn)
PUSH_KICK(dmac->push);
put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
mutex_lock(&dmac->lock); mutex_lock(&dmac->lock);
if (put + nr >= (PAGE_SIZE / 4) - 8) { if (put + nr >= (PAGE_SIZE / 4) - 8) {

4
drivers/gpu/drm/nouveau/dispnv50/disp.h
View File

@ -2,6 +2,7 @@
#define __NV50_KMS_H__ #define __NV50_KMS_H__
#include <linux/workqueue.h> #include <linux/workqueue.h>
#include <nvif/mem.h> #include <nvif/mem.h>
#include <nvif/push.h>
#include "nouveau_display.h" #include "nouveau_display.h"
@ -61,7 +62,8 @@ struct nv50_chan {
struct nv50_dmac { struct nv50_dmac {
struct nv50_chan base; struct nv50_chan base;
struct nvif_mem push; struct nvif_push _push;
struct nvif_push *push;
u32 *ptr; u32 *ptr;
struct nvif_object sync; struct nvif_object sync;

208
drivers/gpu/drm/nouveau/include/nvhw/drf.h Normal file
View File

@ -0,0 +1,208 @@
/*
* Copyright 2019 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __NVHW_DRF_H__
#define __NVHW_DRF_H__
/* Helpers common to all DRF accessors. */
#define DRF_LO(drf) (0 ? drf)
#define DRF_HI(drf) (1 ? drf)
#define DRF_BITS(drf) (DRF_HI(drf) - DRF_LO(drf) + 1)
#define DRF_MASK(drf) (~0ULL >> (64 - DRF_BITS(drf)))
#define DRF_SMASK(drf) (DRF_MASK(drf) << DRF_LO(drf))
/* Helpers for DRF-MW accessors. */
#define DRF_MX_MW(drf) drf
#define DRF_MX(drf) DRF_MX_##drf
#define DRF_MW(drf) DRF_MX(drf)
#define DRF_MW_SPANS(o,drf) (DRF_LW_IDX((o),drf) != DRF_HW_IDX((o),drf))
#define DRF_MW_SIZE(o) (sizeof((o)[0]) * 8)
#define DRF_LW_IDX(o,drf) (DRF_LO(DRF_MW(drf)) / DRF_MW_SIZE(o))
#define DRF_LW_LO(o,drf) (DRF_LO(DRF_MW(drf)) % DRF_MW_SIZE(o))
#define DRF_LW_HI(o,drf) (DRF_MW_SPANS((o),drf) ? (DRF_MW_SIZE(o) - 1) : DRF_HW_HI((o),drf))
#define DRF_LW_BITS(o,drf) (DRF_LW_HI((o),drf) - DRF_LW_LO((o),drf) + 1)
#define DRF_LW_MASK(o,drf) (~0ULL >> (64 - DRF_LW_BITS((o),drf)))
#define DRF_LW_SMASK(o,drf) (DRF_LW_MASK((o),drf) << DRF_LW_LO((o),drf))
#define DRF_LW_GET(o,drf) (((o)[DRF_LW_IDX((o),drf)] >> DRF_LW_LO((o),drf)) & DRF_LW_MASK((o),drf))
#define DRF_LW_VAL(o,drf,v) (((v) & DRF_LW_MASK((o),drf)) << DRF_LW_LO((o),drf))
#define DRF_LW_CLR(o,drf) ((o)[DRF_LW_IDX((o),drf)] & ~DRF_LW_SMASK((o),drf))
#define DRF_LW_SET(o,drf,v) (DRF_LW_CLR((o),drf) | DRF_LW_VAL((o),drf,(v)))
#define DRF_HW_IDX(o,drf) (DRF_HI(DRF_MW(drf)) / DRF_MW_SIZE(o))
#define DRF_HW_LO(o,drf) 0
#define DRF_HW_HI(o,drf) (DRF_HI(DRF_MW(drf)) % DRF_MW_SIZE(o))
#define DRF_HW_BITS(o,drf) (DRF_HW_HI((o),drf) - DRF_HW_LO((o),drf) + 1)
#define DRF_HW_MASK(o,drf) (~0ULL >> (64 - DRF_HW_BITS((o),drf)))
#define DRF_HW_SMASK(o,drf) (DRF_HW_MASK((o),drf) << DRF_HW_LO((o),drf))
#define DRF_HW_GET(o,drf) ((o)[DRF_HW_IDX(o,drf)] & DRF_HW_SMASK((o),drf))
#define DRF_HW_VAL(o,drf,v) (((long long)(v) >> DRF_LW_BITS((o),drf)) & DRF_HW_SMASK((o),drf))
#define DRF_HW_CLR(o,drf) ((o)[DRF_HW_IDX((o),drf)] & ~DRF_HW_SMASK((o),drf))
#define DRF_HW_SET(o,drf,v) (DRF_HW_CLR((o),drf) | DRF_HW_VAL((o),drf,(v)))
/* DRF accessors. */
#define NVVAL_X(drf,v) (((v) & DRF_MASK(drf)) << DRF_LO(drf))
#define NVVAL_N(X,d,r,f, v) NVVAL_X(d##_##r##_##f, (v))
#define NVVAL_I(X,d,r,f,i,v) NVVAL_X(d##_##r##_##f(i), (v))
#define NVVAL_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL
#define NVVAL(A...) NVVAL_(X, ##A, NVVAL_I, NVVAL_N)(X, ##A)
#define NVDEF_N(X,d,r,f, v) NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v)
#define NVDEF_I(X,d,r,f,i,v) NVVAL_X(d##_##r##_##f(i), d##_##r##_##f##_##v)
#define NVDEF_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL
#define NVDEF(A...) NVDEF_(X, ##A, NVDEF_I, NVDEF_N)(X, ##A)
#define NVVAL_GET_X(o,drf) (((o) >> DRF_LO(drf)) & DRF_MASK(drf))
#define NVVAL_GET_N(X,o,d,r,f ) NVVAL_GET_X(o, d##_##r##_##f)
#define NVVAL_GET_I(X,o,d,r,f,i) NVVAL_GET_X(o, d##_##r##_##f(i))
#define NVVAL_GET_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL
#define NVVAL_GET(A...) NVVAL_GET_(X, ##A, NVVAL_GET_I, NVVAL_GET_N)(X, ##A)
#define NVVAL_TEST_X(o,drf,cmp,drfv) (NVVAL_GET_X((o), drf) cmp drfv)
#define NVVAL_TEST_N(X,o,d,r,f, cmp,v) NVVAL_TEST_X(o, d##_##r##_##f , cmp, (v))
#define NVVAL_TEST_I(X,o,d,r,f,i,cmp,v) NVVAL_TEST_X(o, d##_##r##_##f(i), cmp, (v))
#define NVVAL_TEST_(X,_1,_2,_3,_4,_5,_6,_7,IMPL,...) IMPL
#define NVVAL_TEST(A...) NVVAL_TEST_(X, ##A, NVVAL_TEST_I, NVVAL_TEST_N)(X, ##A)
#define NVDEF_TEST_N(X,o,d,r,f, cmp,v) NVVAL_TEST_X(o, d##_##r##_##f , cmp, d##_##r##_##f##_##v)
#define NVDEF_TEST_I(X,o,d,r,f,i,cmp,v) NVVAL_TEST_X(o, d##_##r##_##f(i), cmp, d##_##r##_##f##_##v)
#define NVDEF_TEST_(X,_1,_2,_3,_4,_5,_6,_7,IMPL,...) IMPL
#define NVDEF_TEST(A...) NVDEF_TEST_(X, ##A, NVDEF_TEST_I, NVDEF_TEST_N)(X, ##A)
#define NVVAL_SET_X(o,drf,v) (((o) & ~DRF_SMASK(drf)) | NVVAL_X(drf, (v)))
#define NVVAL_SET_N(X,o,d,r,f, v) NVVAL_SET_X(o, d##_##r##_##f, (v))
#define NVVAL_SET_I(X,o,d,r,f,i,v) NVVAL_SET_X(o, d##_##r##_##f(i), (v))
#define NVVAL_SET_(X,_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
#define NVVAL_SET(A...) NVVAL_SET_(X, ##A, NVVAL_SET_I, NVVAL_SET_N)(X, ##A)
#define NVDEF_SET_N(X,o,d,r,f, v) NVVAL_SET_X(o, d##_##r##_##f, d##_##r##_##f##_##v)
#define NVDEF_SET_I(X,o,d,r,f,i,v) NVVAL_SET_X(o, d##_##r##_##f(i), d##_##r##_##f##_##v)
#define NVDEF_SET_(X,_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
#define NVDEF_SET(A...) NVDEF_SET_(X, ##A, NVDEF_SET_I, NVDEF_SET_N)(X, ##A)
/* DRF-MW accessors. */
#define NVVAL_MW_GET_X(o,drf) \
((DRF_MW_SPANS((o),drf) ? \
(DRF_HW_GET((o),drf) << DRF_LW_BITS((o),drf)) : 0) | DRF_LW_GET((o),drf))
#define NVVAL_MW_GET_N(X,o,d,r,f ) NVVAL_MW_GET_X((o), d##_##r##_##f)
#define NVVAL_MW_GET_I(X,o,d,r,f,i) NVVAL_MW_GET_X((o), d##_##r##_##f(i))
#define NVVAL_MW_GET_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL
#define NVVAL_MW_GET(A...) NVVAL_MW_GET_(X, ##A, NVVAL_MW_GET_I, NVVAL_MW_GET_N)(X, ##A)
#define NVVAL_MW_SET_X(o,drf,v) do { \
(o)[DRF_LW_IDX((o),drf)] = DRF_LW_SET((o),drf,(v)); \
if (DRF_MW_SPANS((o),drf)) \
(o)[DRF_HW_IDX((o),drf)] = DRF_HW_SET((o),drf,(v)); \
} while(0)
#define NVVAL_MW_SET_N(X,o,d,r,f, v) NVVAL_MW_SET_X((o), d##_##r##_##f, (v))
#define NVVAL_MW_SET_I(X,o,d,r,f,i,v) NVVAL_MW_SET_X((o), d##_##r##_##f(i), (v))
#define NVVAL_MW_SET_(X,_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
#define NVVAL_MW_SET(A...) NVVAL_MW_SET_(X, ##A, NVVAL_MW_SET_I, NVVAL_MW_SET_N)(X, ##A)
#define NVDEF_MW_SET_N(X,o,d,r,f, v) NVVAL_MW_SET_X(o, d##_##r##_##f, d##_##r##_##f##_##v)
#define NVDEF_MW_SET_I(X,o,d,r,f,i,v) NVVAL_MW_SET_X(o, d##_##r##_##f(i), d##_##r##_##f##_##v)
#define NVDEF_MW_SET_(X,_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
#define NVDEF_MW_SET(A...) NVDEF_MW_SET_(X, ##A, NVDEF_MW_SET_I, NVDEF_MW_SET_N)(X, ##A)
/* Helper for reading an arbitrary object. */
#define DRF_RD_X(e,p,o,dr) e((p), (o), dr)
#define DRF_RD_N(X,e,p,o,d,r ) DRF_RD_X(e, (p), (o), d##_##r)
#define DRF_RD_I(X,e,p,o,d,r,i) DRF_RD_X(e, (p), (o), d##_##r(i))
#define DRF_RD_(X,_1,_2,_3,_4,_5,_6,IMPL,...) IMPL
#define DRF_RD(A...) DRF_RD_(X, ##A, DRF_RD_I, DRF_RD_N)(X, ##A)
/* Helper for writing an arbitrary object. */
#define DRF_WR_X(e,p,o,dr,v) e((p), (o), dr, (v))
#define DRF_WR_N(X,e,p,o,d,r, v) DRF_WR_X(e, (p), (o), d##_##r , (v))
#define DRF_WR_I(X,e,p,o,d,r,i,v) DRF_WR_X(e, (p), (o), d##_##r(i), (v))
#define DRF_WR_(X,_1,_2,_3,_4,_5,_6,_7,IMPL,...) IMPL
#define DRF_WR(A...) DRF_WR_(X, ##A, DRF_WR_I, DRF_WR_N)(X, ##A)
/* Helper for modifying an arbitrary object. */
#define DRF_MR_X(er,ew,ty,p,o,dr,m,v) ({ \
ty _t = DRF_RD_X(er, (p), (o), dr); \
DRF_WR_X(ew, (p), (o), dr, (_t & ~(m)) | (v)); \
_t; \
})
#define DRF_MR_N(X,er,ew,ty,p,o,d,r ,m,v) DRF_MR_X(er, ew, ty, (p), (o), d##_##r , (m), (v))
#define DRF_MR_I(X,er,ew,ty,p,o,d,r,i,m,v) DRF_MR_X(er, ew, ty, (p), (o), d##_##r(i), (m), (v))
#define DRF_MR_(X,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,IMPL,...) IMPL
#define DRF_MR(A...) DRF_MR_(X, ##A, DRF_MR_I, DRF_MR_N)(X, ##A)
/* Helper for extracting a field value from arbitrary object. */
#define DRF_RV_X(e,p,o,dr,drf) NVVAL_GET_X(DRF_RD_X(e, (p), (o), dr), drf)
#define DRF_RV_N(X,e,p,o,d,r, f) DRF_RV_X(e, (p), (o), d##_##r , d##_##r##_##f)
#define DRF_RV_I(X,e,p,o,d,r,i,f) DRF_RV_X(e, (p), (o), d##_##r(i), d##_##r##_##f)
#define DRF_RV_(X,_1,_2,_3,_4,_5,_6,_7,IMPL,...) IMPL
#define DRF_RV(A...) DRF_RV_(X, ##A, DRF_RV_I, DRF_RV_N)(X, ##A)
/* Helper for writing field value to arbitrary object (all other bits cleared). */
#define DRF_WV_N(X,e,p,o,d,r, f,v) \
DRF_WR_X(e, (p), (o), d##_##r , NVVAL_X(d##_##r##_##f, (v)))
#define DRF_WV_I(X,e,p,o,d,r,i,f,v) \
DRF_WR_X(e, (p), (o), d##_##r(i), NVVAL_X(d##_##r##_##f, (v)))
#define DRF_WV_(X,_1,_2,_3,_4,_5,_6,_7,_8,IMPL,...) IMPL
#define DRF_WV(A...) DRF_WV_(X, ##A, DRF_WV_I, DRF_WV_N)(X, ##A)
/* Helper for writing field definition to arbitrary object (all other bits cleared). */
#define DRF_WD_N(X,e,p,o,d,r, f,v) \
DRF_WR_X(e, (p), (o), d##_##r , NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v))
#define DRF_WD_I(X,e,p,o,d,r,i,f,v) \
DRF_WR_X(e, (p), (o), d##_##r(i), NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v))
#define DRF_WD_(X,_1,_2,_3,_4,_5,_6,_7,_8,IMPL,...) IMPL
#define DRF_WD(A...) DRF_WD_(X, ##A, DRF_WD_I, DRF_WD_N)(X, ##A)
/* Helper for modifying field value in arbitrary object. */
#define DRF_MV_N(X,er,ew,ty,p,o,d,r, f,v) \
NVVAL_GET_X(DRF_MR_X(er, ew, ty, (p), (o), d##_##r , DRF_SMASK(d##_##r##_##f), \
NVVAL_X(d##_##r##_##f, (v))), d##_##r##_##f)
#define DRF_MV_I(X,er,ew,ty,p,o,d,r,i,f,v) \
NVVAL_GET_X(DRF_MR_X(er, ew, ty, (p), (o), d##_##r(i), DRF_SMASK(d##_##r##_##f), \
NVVAL_X(d##_##r##_##f, (v))), d##_##r##_##f)
#define DRF_MV_(X,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,IMPL,...) IMPL
#define DRF_MV(A...) DRF_MV_(X, ##A, DRF_MV_I, DRF_MV_N)(X, ##A)
/* Helper for modifying field definition in arbitrary object. */
#define DRF_MD_N(X,er,ew,ty,p,o,d,r, f,v) \
NVVAL_GET_X(DRF_MR_X(er, ew, ty, (p), (o), d##_##r , DRF_SMASK(d##_##r##_##f), \
NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v)), d##_##r##_##f)
#define DRF_MD_I(X,er,ew,ty,p,o,d,r,i,f,v) \
NVVAL_GET_X(DRF_MR_X(er, ew, ty, (p), (o), d##_##r(i), DRF_SMASK(d##_##r##_##f), \
NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v)), d##_##r##_##f)
#define DRF_MD_(X,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,IMPL,...) IMPL
#define DRF_MD(A...) DRF_MD_(X, ##A, DRF_MD_I, DRF_MD_N)(X, ##A)
/* Helper for testing against field value in aribtrary object */
#define DRF_TV_N(X,e,p,o,d,r, f,cmp,v) \
NVVAL_TEST_X(DRF_RD_X(e, (p), (o), d##_##r ), d##_##r##_##f, cmp, (v))
#define DRF_TV_I(X,e,p,o,d,r,i,f,cmp,v) \
NVVAL_TEST_X(DRF_RD_X(e, (p), (o), d##_##r(i)), d##_##r##_##f, cmp, (v))
#define DRF_TV_(X,_1,_2,_3,_4,_5,_6,_7,_8,_9,IMPL,...) IMPL
#define DRF_TV(A...) DRF_TV_(X, ##A, DRF_TV_I, DRF_TV_N)(X, ##A)
/* Helper for testing against field definition in aribtrary object */
#define DRF_TD_N(X,e,p,o,d,r, f,cmp,v) \
NVVAL_TEST_X(DRF_RD_X(e, (p), (o), d##_##r ), d##_##r##_##f, cmp, d##_##r##_##f##_##v)
#define DRF_TD_I(X,e,p,o,d,r,i,f,cmp,v) \
NVVAL_TEST_X(DRF_RD_X(e, (p), (o), d##_##r(i)), d##_##r##_##f, cmp, d##_##r##_##f##_##v)
#define DRF_TD_(X,_1,_2,_3,_4,_5,_6,_7,_8,_9,IMPL,...) IMPL
#define DRF_TD(A...) DRF_TD_(X, ##A, DRF_TD_I, DRF_TD_N)(X, ##A)
#endif

359
drivers/gpu/drm/nouveau/include/nvif/push.h Normal file
View File

@ -0,0 +1,359 @@
/*
* Copyright 2019 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __NVIF_PUSH_H__
#define __NVIF_PUSH_H__
#include <nvif/mem.h>
#include <nvif/printf.h>
#include <nvhw/drf.h>
struct nvif_push {
int (*wait)(struct nvif_push *push, u32 size);
void (*kick)(struct nvif_push *push);
struct nvif_mem mem;
u32 *bgn;
u32 *cur;
u32 *seg;
u32 *end;
};
static inline __must_check int
PUSH_WAIT(struct nvif_push *push, u32 size)
{
if (push->cur + size >= push->end) {
int ret = push->wait(push, size);
if (ret)
return ret;
}
#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
push->seg = push->cur + size;
#endif
return 0;
}
static inline int
PUSH_KICK(struct nvif_push *push)
{
push->kick(push);
return 0;
}
#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
#define PUSH_PRINTF(p,f,a...) do { \
struct nvif_push *_ppp = (p); \
u32 __o = _ppp->cur - (u32 *)_ppp->mem.object.map.ptr; \
NVIF_DEBUG(&_ppp->mem.object, "%08x: "f, __o * 4, ##a); \
(void)__o; \
} while(0)
#define PUSH_ASSERT_ON(a,b) WARN((a), b)
#else
#define PUSH_PRINTF(p,f,a...)
#define PUSH_ASSERT_ON(a, b)
#endif
#define PUSH_ASSERT(a,b) do { \
static_assert( \
__builtin_choose_expr(__builtin_constant_p(a), (a), 1), b \
); \
PUSH_ASSERT_ON(!(a), b); \
} while(0)
#define PUSH_DATA__(p,d,f,a...) do { \
struct nvif_push *_p = (p); \
u32 _d = (d); \
PUSH_ASSERT(_p->cur < _p->seg, "segment overrun"); \
PUSH_ASSERT(_p->cur < _p->end, "pushbuf overrun"); \
PUSH_PRINTF(_p, "%08x"f, _d, ##a); \
*_p->cur++ = _d; \
} while(0)
#define PUSH_DATA_(X,p,m,i0,i1,d,s,f,a...) PUSH_DATA__((p), (d), "-> "#m f, ##a)
#define PUSH_DATA(p,d) PUSH_DATA__((p), (d), " data - %s", __func__)
//XXX: error-check this against *real* pushbuffer end?
#define PUSH_RSVD(p,d) do { \
struct nvif_push *__p = (p); \
__p->seg++; \
__p->end++; \
d; \
} while(0)
#ifdef CONFIG_NOUVEAU_DEBUG_PUSH
#define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \
struct nvif_push *_pp = (p); \
const u32 *_dd = (d); \
u32 _s = (s), _i = (i?PUSH_##o##_INC); \
if (_s--) { \
PUSH_DATA_(X, _pp, X##m, i0, i1, *_dd++, 1, "+0x%x", 0); \
while (_s--) { \
PUSH_DATA_(X, _pp, X##m, i0, i1, *_dd++, 1, "+0x%x", _i); \
_i += (0?PUSH_##o##_INC); \
} \
} \
} while(0)
#else
#define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \
struct nvif_push *_p = (p); \
u32 _s = (s); \
PUSH_ASSERT(_p->cur + _s <= _p->seg, "segment overrun"); \
PUSH_ASSERT(_p->cur + _s <= _p->end, "pushbuf overrun"); \
memcpy(_p->cur, (d), _s << 2); \
_p->cur += _s; \
} while(0)
#endif
#define PUSH_1(X,f,ds,n,c,o,p,s,mA,dA) do { \
PUSH_##o##_HDR((p), s, mA, (c)+(n)); \
PUSH_##f(X, (p), X##mA, 1, o, (dA), ds, ""); \
} while(0)
#define PUSH_2(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (1?PUSH_##o##_INC), "mthd1"); \
PUSH_1(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_3(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd2"); \
PUSH_2(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_4(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd3"); \
PUSH_3(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_5(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd4"); \
PUSH_4(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_6(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd5"); \
PUSH_5(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_7(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd6"); \
PUSH_6(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_8(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd7"); \
PUSH_7(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_9(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd8"); \
PUSH_8(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_10(X,f,ds,n,c,o,p,s,mB,dB,mA,dA,a...) do { \
PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd9"); \
PUSH_9(X, DATA_, 1, ds, (c)+(n), o, (p), s, X##mA, (dA), ##a); \
PUSH_##f(X, (p), X##mB, 0, o, (dB), ds, ""); \
} while(0)
#define PUSH_1D(X,o,p,s,mA,dA) \
PUSH_1(X, DATA_, 1, 1, 0, o, (p), s, X##mA, (dA))
#define PUSH_2D(X,o,p,s,mA,dA,mB,dB) \
PUSH_2(X, DATA_, 1, 1, 0, o, (p), s, X##mB, (dB), \
X##mA, (dA))
#define PUSH_3D(X,o,p,s,mA,dA,mB,dB,mC,dC) \
PUSH_3(X, DATA_, 1, 1, 0, o, (p), s, X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_4D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD) \
PUSH_4(X, DATA_, 1, 1, 0, o, (p), s, X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_5D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE) \
PUSH_5(X, DATA_, 1, 1, 0, o, (p), s, X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_6D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF) \
PUSH_6(X, DATA_, 1, 1, 0, o, (p), s, X##mF, (dF), \
X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_7D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG) \
PUSH_7(X, DATA_, 1, 1, 0, o, (p), s, X##mG, (dG), \
X##mF, (dF), \
X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_8D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH) \
PUSH_8(X, DATA_, 1, 1, 0, o, (p), s, X##mH, (dH), \
X##mG, (dG), \
X##mF, (dF), \
X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_9D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI) \
PUSH_9(X, DATA_, 1, 1, 0, o, (p), s, X##mI, (dI), \
X##mH, (dH), \
X##mG, (dG), \
X##mF, (dF), \
X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_10D(X,o,p,s,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI,mJ,dJ) \
PUSH_10(X, DATA_, 1, 1, 0, o, (p), s, X##mJ, (dJ), \
X##mI, (dI), \
X##mH, (dH), \
X##mG, (dG), \
X##mF, (dF), \
X##mE, (dE), \
X##mD, (dD), \
X##mC, (dC), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_1P(X,o,p,s,mA,dp,ds) \
PUSH_1(X, DATAp, ds, ds, 0, o, (p), s, X##mA, (dp))
#define PUSH_2P(X,o,p,s,mA,dA,mB,dp,ds) \
PUSH_2(X, DATAp, ds, ds, 0, o, (p), s, X##mB, (dp), \
X##mA, (dA))
#define PUSH_3P(X,o,p,s,mA,dA,mB,dB,mC,dp,ds) \
PUSH_3(X, DATAp, ds, ds, 0, o, (p), s, X##mC, (dp), \
X##mB, (dB), \
X##mA, (dA))
#define PUSH_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
#define PUSH(A...) PUSH_(A, PUSH_10P, PUSH_10D, \
PUSH_9P , PUSH_9D, \
PUSH_8P , PUSH_8D, \
PUSH_7P , PUSH_7D, \
PUSH_6P , PUSH_6D, \
PUSH_5P , PUSH_5D, \
PUSH_4P , PUSH_4D, \
PUSH_3P , PUSH_3D, \
PUSH_2P , PUSH_2D, \
PUSH_1P , PUSH_1D)(, ##A)
#define PUSH_NVIM(p,c,m,d) do { \
struct nvif_push *__p = (p); \
u32 __d = (d); \
PUSH_IMMD_HDR(__p, c, m, __d); \
__p->cur--; \
PUSH_PRINTF(__p, "%08x-> "#m, __d); \
__p->cur++; \
} while(0)
#define PUSH_NVSQ(A...) PUSH(MTHD, ##A)
#define PUSH_NV1I(A...) PUSH(1INC, ##A)
#define PUSH_NVNI(A...) PUSH(NINC, ##A)
#define PUSH_NV_1(X,o,p,c,mA,d...) \
PUSH_##o(p,c,c##_##mA,d)
#define PUSH_NV_2(X,o,p,c,mA,dA,mB,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,d)
#define PUSH_NV_3(X,o,p,c,mA,dA,mB,dB,mC,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,d)
#define PUSH_NV_4(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,d)
#define PUSH_NV_5(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,d)
#define PUSH_NV_6(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,dE, \
c##_##mF,d)
#define PUSH_NV_7(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,dE, \
c##_##mF,dF, \
c##_##mG,d)
#define PUSH_NV_8(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,dE, \
c##_##mF,dF, \
c##_##mG,dG, \
c##_##mH,d)
#define PUSH_NV_9(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,dE, \
c##_##mF,dF, \
c##_##mG,dG, \
c##_##mH,dH, \
c##_##mI,d)
#define PUSH_NV_10(X,o,p,c,mA,dA,mB,dB,mC,dC,mD,dD,mE,dE,mF,dF,mG,dG,mH,dH,mI,dI,mJ,d...) \
PUSH_##o(p,c,c##_##mA,dA, \
c##_##mB,dB, \
c##_##mC,dC, \
c##_##mD,dD, \
c##_##mE,dE, \
c##_##mF,dF, \
c##_##mG,dG, \
c##_##mH,dH, \
c##_##mI,dI, \
c##_##mJ,d)
#define PUSH_NV_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
#define PUSH_NV(A...) PUSH_NV_(A, PUSH_NV_10, PUSH_NV_10, \
PUSH_NV_9 , PUSH_NV_9, \
PUSH_NV_8 , PUSH_NV_8, \
PUSH_NV_7 , PUSH_NV_7, \
PUSH_NV_6 , PUSH_NV_6, \
PUSH_NV_5 , PUSH_NV_5, \
PUSH_NV_4 , PUSH_NV_4, \
PUSH_NV_3 , PUSH_NV_3, \
PUSH_NV_2 , PUSH_NV_2, \
PUSH_NV_1 , PUSH_NV_1)(, ##A)
#define PUSH_IMMD(A...) PUSH_NV(NVIM, ##A)
#define PUSH_MTHD(A...) PUSH_NV(NVSQ, ##A)
#define PUSH_1INC(A...) PUSH_NV(NV1I, ##A)
#define PUSH_NINC(A...) PUSH_NV(NVNI, ##A)
#endif