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Remove msic_dcr_read() in axon_msi.c
msic_dcr_read() doesn't really do anything useful, just replace it with direct calls to dcr_read(). Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -80,18 +80,13 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
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dcr_write(msic->dcr_host, dcr_n, val);
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}
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static u32 msic_dcr_read(struct axon_msic *msic, unsigned int dcr_n)
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{
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return dcr_read(msic->dcr_host, dcr_n);
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}
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static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct axon_msic *msic = get_irq_data(irq);
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u32 write_offset, msi;
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int idx;
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write_offset = msic_dcr_read(msic, MSIC_WRITE_OFFSET_REG);
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write_offset = dcr_read(msic->dcr_host, MSIC_WRITE_OFFSET_REG);
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pr_debug("axon_msi: original write_offset 0x%x\n", write_offset);
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/* write_offset doesn't wrap properly, so we have to mask it */
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@ -306,7 +301,7 @@ static int axon_msi_notify_reboot(struct notifier_block *nb,
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list_for_each_entry(msic, &axon_msic_list, list) {
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pr_debug("axon_msi: disabling %s\n",
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msic->irq_host->of_node->full_name);
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tmp = msic_dcr_read(msic, MSIC_CTRL_REG);
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tmp = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
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tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
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msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
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}
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