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s390/startup: avoid save_area_sync overflow
Currently we overflow save_area_sync and write over save_area_async. Although this is not a real problem make startup_pgm_check_handler consistent with late pgm check handler and store [%r0,%r7] directly into gpregs_save_area. Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
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1c7c83e8d2
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2835c2ea95
@ -360,22 +360,23 @@ ENTRY(startup_kdump)
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# the save area and does disabled wait with a faulty address.
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#
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ENTRY(startup_pgm_check_handler)
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stmg %r0,%r15,__LC_SAVE_AREA_SYNC
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la %r1,4095
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stctg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r1)
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mvc __LC_GPREGS_SAVE_AREA-4095(128,%r1),__LC_SAVE_AREA_SYNC
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mvc __LC_PSW_SAVE_AREA-4095(16,%r1),__LC_PGM_OLD_PSW
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stmg %r8,%r15,__LC_SAVE_AREA_SYNC
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la %r8,4095
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stctg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r8)
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stmg %r0,%r7,__LC_GPREGS_SAVE_AREA-4095(%r8)
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mvc __LC_GPREGS_SAVE_AREA-4095+64(64,%r8),__LC_SAVE_AREA_SYNC
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mvc __LC_PSW_SAVE_AREA-4095(16,%r8),__LC_PGM_OLD_PSW
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mvc __LC_RETURN_PSW(16),__LC_PGM_OLD_PSW
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ni __LC_RETURN_PSW,0xfc # remove IO and EX bits
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ni __LC_RETURN_PSW+1,0xfb # remove MCHK bit
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oi __LC_RETURN_PSW+1,0x2 # set wait state bit
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larl %r2,.Lold_psw_disabled_wait
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stg %r2,__LC_PGM_NEW_PSW+8
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l %r15,.Ldump_info_stack-.Lold_psw_disabled_wait(%r2)
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larl %r9,.Lold_psw_disabled_wait
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stg %r9,__LC_PGM_NEW_PSW+8
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l %r15,.Ldump_info_stack-.Lold_psw_disabled_wait(%r9)
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brasl %r14,print_pgm_check_info
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.Lold_psw_disabled_wait:
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la %r1,4095
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lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
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la %r8,4095
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lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r8)
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lpswe __LC_RETURN_PSW # disabled wait
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.Ldump_info_stack:
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.long 0x5000 + PAGE_SIZE - STACK_FRAME_OVERHEAD
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