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Merge remote-tracking branches 'spi/topic/ti-qspi' and 'spi/topic/xlp' into spi-next
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commit
282ec0ea65
@ -169,6 +169,7 @@ static const struct acpi_device_id acpi_apd_device_ids[] = {
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#ifdef CONFIG_ARM64
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{ "APMC0D0F", APD_ADDR(xgene_i2c_desc) },
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{ "BRCM900D", APD_ADDR(vulcan_spi_desc) },
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{ "CAV900D", APD_ADDR(vulcan_spi_desc) },
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#endif
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{ }
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};
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@ -715,7 +715,7 @@ config SPI_XILINX
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config SPI_XLP
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tristate "Netlogic XLP SPI controller driver"
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depends on CPU_XLP || ARCH_VULCAN || COMPILE_TEST
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depends on CPU_XLP || ARCH_THUNDER2 || COMPILE_TEST
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help
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Enable support for the SPI controller on the Netlogic XLP SoCs.
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Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX, XLP9XX
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@ -33,6 +33,7 @@
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#include <linux/pinctrl/consumer.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/sizes.h>
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#include <linux/spi/spi.h>
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@ -57,6 +58,8 @@ struct ti_qspi {
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struct ti_qspi_regs ctx_reg;
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dma_addr_t mmap_phys_base;
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dma_addr_t rx_bb_dma_addr;
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void *rx_bb_addr;
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struct dma_chan *rx_chan;
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u32 spi_max_frequency;
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@ -126,6 +129,8 @@ struct ti_qspi {
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#define QSPI_SETUP_ADDR_SHIFT 8
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#define QSPI_SETUP_DUMMY_SHIFT 10
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#define QSPI_DMA_BUFFER_SIZE SZ_64K
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static inline unsigned long ti_qspi_read(struct ti_qspi *qspi,
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unsigned long reg)
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{
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@ -395,14 +400,12 @@ static int ti_qspi_dma_xfer(struct ti_qspi *qspi, dma_addr_t dma_dst,
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dma_addr_t dma_src, size_t len)
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{
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struct dma_chan *chan = qspi->rx_chan;
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struct dma_device *dma_dev = chan->device;
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dma_cookie_t cookie;
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enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
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struct dma_async_tx_descriptor *tx;
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int ret;
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tx = dma_dev->device_prep_dma_memcpy(chan, dma_dst, dma_src,
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len, flags);
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tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len, flags);
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if (!tx) {
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dev_err(qspi->dev, "device_prep_dma_memcpy error\n");
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return -EIO;
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@ -431,6 +434,35 @@ static int ti_qspi_dma_xfer(struct ti_qspi *qspi, dma_addr_t dma_dst,
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return 0;
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}
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static int ti_qspi_dma_bounce_buffer(struct ti_qspi *qspi,
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struct spi_flash_read_message *msg)
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{
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size_t readsize = msg->len;
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void *to = msg->buf;
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dma_addr_t dma_src = qspi->mmap_phys_base + msg->from;
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int ret = 0;
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/*
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* Use bounce buffer as FS like jffs2, ubifs may pass
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* buffers that does not belong to kernel lowmem region.
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*/
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while (readsize != 0) {
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size_t xfer_len = min_t(size_t, QSPI_DMA_BUFFER_SIZE,
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readsize);
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ret = ti_qspi_dma_xfer(qspi, qspi->rx_bb_dma_addr,
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dma_src, xfer_len);
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if (ret != 0)
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return ret;
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memcpy(to, qspi->rx_bb_addr, xfer_len);
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readsize -= xfer_len;
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dma_src += xfer_len;
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to += xfer_len;
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}
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return ret;
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}
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static int ti_qspi_dma_xfer_sg(struct ti_qspi *qspi, struct sg_table rx_sg,
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loff_t from)
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{
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@ -498,6 +530,12 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi,
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QSPI_SPI_SETUP_REG(spi->chip_select));
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}
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static bool ti_qspi_spi_flash_can_dma(struct spi_device *spi,
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struct spi_flash_read_message *msg)
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{
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return virt_addr_valid(msg->buf);
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}
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static int ti_qspi_spi_flash_read(struct spi_device *spi,
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struct spi_flash_read_message *msg)
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{
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@ -511,15 +549,12 @@ static int ti_qspi_spi_flash_read(struct spi_device *spi,
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ti_qspi_setup_mmap_read(spi, msg);
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if (qspi->rx_chan) {
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if (msg->cur_msg_mapped) {
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if (msg->cur_msg_mapped)
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ret = ti_qspi_dma_xfer_sg(qspi, msg->rx_sg, msg->from);
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if (ret)
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goto err_unlock;
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} else {
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dev_err(qspi->dev, "Invalid address for DMA\n");
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ret = -EIO;
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else
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ret = ti_qspi_dma_bounce_buffer(qspi, msg);
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if (ret)
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goto err_unlock;
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}
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} else {
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memcpy_fromio(msg->buf, qspi->mmap_base + msg->from, msg->len);
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}
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@ -725,6 +760,17 @@ static int ti_qspi_probe(struct platform_device *pdev)
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ret = 0;
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goto no_dma;
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}
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qspi->rx_bb_addr = dma_alloc_coherent(qspi->dev,
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QSPI_DMA_BUFFER_SIZE,
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&qspi->rx_bb_dma_addr,
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GFP_KERNEL | GFP_DMA);
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if (!qspi->rx_bb_addr) {
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dev_err(qspi->dev,
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"dma_alloc_coherent failed, using PIO mode\n");
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dma_release_channel(qspi->rx_chan);
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goto no_dma;
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}
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master->spi_flash_can_dma = ti_qspi_spi_flash_can_dma;
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master->dma_rx = qspi->rx_chan;
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init_completion(&qspi->transfer_complete);
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if (res_mmap)
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@ -765,6 +811,10 @@ static int ti_qspi_remove(struct platform_device *pdev)
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pm_runtime_put_sync(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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if (qspi->rx_bb_addr)
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dma_free_coherent(qspi->dev, QSPI_DMA_BUFFER_SIZE,
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qspi->rx_bb_addr,
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qspi->rx_bb_dma_addr);
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if (qspi->rx_chan)
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dma_release_channel(qspi->rx_chan);
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@ -442,6 +442,7 @@ static int xlp_spi_probe(struct platform_device *pdev)
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id xlp_spi_acpi_match[] = {
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{ "BRCM900D", 0 },
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{ "CAV900D", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, xlp_spi_acpi_match);
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@ -2854,7 +2854,7 @@ int spi_flash_read(struct spi_device *spi,
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mutex_lock(&master->bus_lock_mutex);
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mutex_lock(&master->io_mutex);
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if (master->dma_rx) {
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if (master->dma_rx && master->spi_flash_can_dma(spi, msg)) {
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rx_dev = master->dma_rx->device->dev;
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ret = spi_map_buf(master, rx_dev, &msg->rx_sg,
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msg->buf, msg->len,
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@ -376,6 +376,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* @unprepare_message: undo any work done by prepare_message().
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* @spi_flash_read: to support spi-controller hardwares that provide
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* accelerated interface to read from flash devices.
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* @spi_flash_can_dma: analogous to can_dma() interface, but for
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* controllers implementing spi_flash_read.
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* @flash_read_supported: spi device supports flash read
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* @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
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* number. Any individual value may be -ENOENT for CS lines that
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@ -539,6 +541,8 @@ struct spi_master {
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struct spi_message *message);
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int (*spi_flash_read)(struct spi_device *spi,
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struct spi_flash_read_message *msg);
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bool (*spi_flash_can_dma)(struct spi_device *spi,
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struct spi_flash_read_message *msg);
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bool (*flash_read_supported)(struct spi_device *spi);
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/*
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