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drm/exynos: scaler: Reset hardware before starting the operation
Ensure that Scaler hardware is properly reset and interrupts are cleared before processing next image. Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -30,6 +30,7 @@
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#define scaler_write(cfg, offset) writel(cfg, scaler->regs + (offset))
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#define SCALER_MAX_CLK 4
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#define SCALER_AUTOSUSPEND_DELAY 2000
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#define SCALER_RESET_WAIT_RETRIES 100
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struct scaler_data {
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const char *clk_name[SCALER_MAX_CLK];
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@ -100,6 +101,23 @@ static u32 scaler_get_format(u32 drm_fmt)
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return 0;
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}
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static inline int scaler_reset(struct scaler_context *scaler)
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{
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int retry = SCALER_RESET_WAIT_RETRIES;
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scaler_write(SCALER_CFG_SOFT_RESET, SCALER_CFG);
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do {
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cpu_relax();
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} while (retry > 1 &&
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scaler_read(SCALER_CFG) & SCALER_CFG_SOFT_RESET);
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do {
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cpu_relax();
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scaler_write(1, SCALER_INT_EN);
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} while (retry > 0 && scaler_read(SCALER_INT_EN) != 1);
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return retry ? 0 : -EIO;
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}
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static inline void scaler_enable_int(struct scaler_context *scaler)
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{
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u32 val;
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@ -354,9 +372,13 @@ static int scaler_commit(struct exynos_drm_ipp *ipp,
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u32 dst_fmt = scaler_get_format(task->dst.buf.fourcc);
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struct drm_exynos_ipp_task_rect *dst_pos = &task->dst.rect;
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scaler->task = task;
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pm_runtime_get_sync(scaler->dev);
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if (scaler_reset(scaler)) {
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pm_runtime_put(scaler->dev);
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return -EIO;
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}
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scaler->task = task;
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scaler_set_src_fmt(scaler, src_fmt);
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scaler_set_src_base(scaler, &task->src);
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@ -394,7 +416,11 @@ static inline void scaler_disable_int(struct scaler_context *scaler)
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static inline u32 scaler_get_int_status(struct scaler_context *scaler)
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{
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return scaler_read(SCALER_INT_STATUS);
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u32 val = scaler_read(SCALER_INT_STATUS);
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scaler_write(val, SCALER_INT_STATUS);
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return val;
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}
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static inline int scaler_task_done(u32 val)
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