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phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200

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Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-2-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Siddharth Vadapalli 2022-06-28 15:22:49 +03:00 committed by Vinod Koul
parent 568035b01c
commit 27ecdd07e3
1 changed files with 13 additions and 6 deletions
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19
drivers/phy/ti/phy-j721e-wiz.c
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@ -325,7 +325,8 @@ static int wiz_p_mac_div_sel(struct wiz *wiz)
int i;
for (i = 0; i < num_lanes; i++) {
if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||
wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
if (ret)
return ret;
@ -1025,12 +1026,18 @@ static int wiz_phy_reset_assert(struct reset_controller_dev *rcdev,
static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
{
if (wiz->type != AM64_WIZ_10G)
switch (wiz->type) {
case AM64_WIZ_10G:
if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
break;
case J721E_WIZ_10G:
if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
break;
default:
return 0;
if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
}
return 0;
}