korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-13 14:24:11 +08:00
Code Issues Packages Projects Releases Wiki Activity

microblaze: implement the new page table range API

Browse Source 
Rename PFN_SHIFT_OFFSET to PTE_PFN_SHIFT.  Change the calling convention
for set_pte() to be the same as other architectures.  Add
update_mmu_cache_range(), flush_icache_pages() and flush_dcache_folio().

[arnd@arndb.de: mark flush_dcache_folio() inline]
  Link: https://lkml.kernel.org/r/20230810141947.1236730-9-arnd@kernel.org
Link: https://lkml.kernel.org/r/20230802151406.3735276-17-willy@infradead.org
Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mike Rapoport (IBM) <rppt@kernel.org>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
This commit is contained in:
Matthew Wilcox (Oracle) 2023-08-02 16:13:44 +01:00 committed by Andrew Morton
parent 5553b15a4b
commit 27a8b944fe
3 changed files with 15 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/microblaze/include/asm/cacheflush.h
View File

@ -74,6 +74,14 @@ do { \
flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \ flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
} while (0); } while (0);
static inline void flush_dcache_folio(struct folio *folio)
{
unsigned long addr = folio_pfn(folio) << PAGE_SHIFT;
flush_dcache_range(addr, addr + folio_size(folio));
}
#define flush_dcache_folio flush_dcache_folio
#define flush_cache_page(vma, vmaddr, pfn) \ #define flush_cache_page(vma, vmaddr, pfn) \
flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE); flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);

15
arch/microblaze/include/asm/pgtable.h
View File

@ -230,12 +230,12 @@ extern unsigned long empty_zero_page[1024];
#define pte_page(x) (mem_map + (unsigned long) \ #define pte_page(x) (mem_map + (unsigned long) \
((pte_val(x) - memory_start) >> PAGE_SHIFT)) ((pte_val(x) - memory_start) >> PAGE_SHIFT))
#define PFN_SHIFT_OFFSET (PAGE_SHIFT) #define PFN_PTE_SHIFT PAGE_SHIFT
#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) #define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
#define pfn_pte(pfn, prot) \ #define pfn_pte(pfn, prot) \
__pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) | pgprot_val(prot)) __pte(((pte_basic_t)(pfn) << PFN_PTE_SHIFT) | pgprot_val(prot))
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
/* /*
@ -330,14 +330,7 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr,
/* /*
* set_pte stores a linux PTE into the linux page table. * set_pte stores a linux PTE into the linux page table.
*/ */
static inline void set_pte(struct mm_struct *mm, unsigned long addr, static inline void set_pte(pte_t *ptep, pte_t pte)
pte_t *ptep, pte_t pte)
{
*ptep = pte;
}
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, pte_t pte)
{ {
*ptep = pte; *ptep = pte;
} }

4
arch/microblaze/include/asm/tlbflush.h
View File

@ -33,7 +33,9 @@ static inline void local_flush_tlb_range(struct vm_area_struct *vma,
#define flush_tlb_kernel_range(start, end) do { } while (0) #define flush_tlb_kernel_range(start, end) do { } while (0)
#define update_mmu_cache(vma, addr, ptep) do { } while (0) #define update_mmu_cache_range(vmf, vma, addr, ptep, nr) do { } while (0)
#define update_mmu_cache(vma, addr, pte) \
update_mmu_cache_range(NULL, vma, addr, ptep, 1)
#define flush_tlb_all local_flush_tlb_all #define flush_tlb_all local_flush_tlb_all
#define flush_tlb_mm local_flush_tlb_mm #define flush_tlb_mm local_flush_tlb_mm