Blackfin arch: Update some inline assembly, tweak some register constraints

Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Robin Getz 2009-01-07 23:14:39 +08:00 committed by Bryan Wu
parent 2377feb4ce
commit 26fe19f760
3 changed files with 10 additions and 5 deletions

View File

@ -43,6 +43,11 @@ __attribute__((__noreturn__))
static inline void bfrom_SoftReset(void *new_stack)
{
while (1)
/*
* We don't declare the SP as clobbered on purpose, since
* it confuses the heck out of the compiler, and this function
* never returns
*/
__asm__ __volatile__(
"sp = %[stack];"
"jump (%[bfrom_syscontrol]);"

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@ -44,10 +44,10 @@
/*
* Force strict CPU ordering.
*/
#define nop() asm volatile ("nop;\n\t"::)
#define mb() asm volatile ("" : : :"memory")
#define rmb() asm volatile ("" : : :"memory")
#define wmb() asm volatile ("" : : :"memory")
#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
#define mb() __asm__ __volatile__ ("" : : : "memory")
#define rmb() __asm__ __volatile__ ("" : : : "memory")
#define wmb() __asm__ __volatile__ ("" : : : "memory")
#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
#define read_barrier_depends() do { } while(0)

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@ -91,7 +91,7 @@ __attribute_const__
static inline struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
__asm__("%0 = sp;": "=&d"(ti):
__asm__("%0 = sp;" : "=da"(ti) :
);
return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
}