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dmaengine: xilinx: xdma: Fix the count of elapsed periods in cyclic mode
Xilinx DMA engine is capable of keeping track of the number of elapsed
periods and this is an increasing 32-bit counter which is only reset
when turning off the engine. No need to add this value to our local
counter.
Fixes: cd8c732ce1
("dmaengine: xilinx: xdma: Support cyclic transfers")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20231130111315.729430-2-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
e271c0ba3f
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@ -754,9 +754,9 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
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if (ret)
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goto out;
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desc->completed_desc_num += complete_desc_num;
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if (desc->cyclic) {
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desc->completed_desc_num = complete_desc_num;
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ret = regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS,
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&st);
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if (ret)
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@ -768,6 +768,8 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
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goto out;
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}
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desc->completed_desc_num += complete_desc_num;
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/*
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* if all data blocks are transferred, remove and complete the request
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*/
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