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dmaengine: imx-sdma: add clock ratio 1:1 check
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted, since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach to 500Mhz, so use 1:1 instead. Based on NXP commit MLK-16841-1 by Robin Gong <yibin.gong@nxp.com> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -440,6 +440,8 @@ struct sdma_engine {
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unsigned int irq;
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dma_addr_t bd0_phys;
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struct sdma_buffer_descriptor *bd0;
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/* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
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bool clk_ratio;
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};
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static int sdma_config_write(struct dma_chan *chan,
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@ -662,8 +664,11 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
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dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
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/* Set bits of CONFIG register with dynamic context switching */
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if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
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writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
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reg = readl(sdma->regs + SDMA_H_CONFIG);
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if ((reg & SDMA_H_CONFIG_CSM) == 0) {
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reg |= SDMA_H_CONFIG_CSM;
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writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
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}
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return ret;
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}
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@ -1839,6 +1844,9 @@ static int sdma_init(struct sdma_engine *sdma)
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if (ret)
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goto disable_clk_ipg;
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if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))
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sdma->clk_ratio = 1;
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/* Be sure SDMA has not started yet */
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writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
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@ -1879,7 +1887,9 @@ static int sdma_init(struct sdma_engine *sdma)
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writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
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/* Set bits of CONFIG register but with static context switching */
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/* FIXME: Check whether to set ACR bit depending on clock ratios */
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if (sdma->clk_ratio)
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writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);
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else
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writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
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writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
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