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iwl3945: Have consistant and not redefined HW constants
SRAM addresses are different for 3945, 4065, and 5000, let's give them different names. Also, the RSSI_OFFSET is different for 3945 and 4965, thus they should be named differently. Signed-off-by: Samuel Ortiz <samuel.ortiz@intel.com> Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -82,7 +82,7 @@
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#define LONG_SLOT_TIME 20
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/* RSSI to dBm */
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#define IWL_RSSI_OFFSET 95
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#define IWL39_RSSI_OFFSET 95
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/*
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* EEPROM related constants, enums, and structures.
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@ -276,27 +276,29 @@ struct iwl3945_eeprom {
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/* Sizes and addresses for instruction and data memory (SRAM) in
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* 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
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#define RTC_INST_LOWER_BOUND (0x000000)
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#define ALM_RTC_INST_UPPER_BOUND (0x014000)
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#define IWL39_RTC_INST_LOWER_BOUND (0x000000)
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#define IWL39_RTC_INST_UPPER_BOUND (0x014000)
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#define RTC_DATA_LOWER_BOUND (0x800000)
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#define ALM_RTC_DATA_UPPER_BOUND (0x808000)
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#define IWL39_RTC_DATA_LOWER_BOUND (0x800000)
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#define IWL39_RTC_DATA_UPPER_BOUND (0x808000)
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#define ALM_RTC_INST_SIZE (ALM_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
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#define ALM_RTC_DATA_SIZE (ALM_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
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#define IWL39_RTC_INST_SIZE (IWL39_RTC_INST_UPPER_BOUND - \
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IWL39_RTC_INST_LOWER_BOUND)
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#define IWL39_RTC_DATA_SIZE (IWL39_RTC_DATA_UPPER_BOUND - \
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IWL39_RTC_DATA_LOWER_BOUND)
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#define IWL_MAX_INST_SIZE ALM_RTC_INST_SIZE
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#define IWL_MAX_DATA_SIZE ALM_RTC_DATA_SIZE
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#define IWL39_MAX_INST_SIZE IWL39_RTC_INST_SIZE
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#define IWL39_MAX_DATA_SIZE IWL39_RTC_DATA_SIZE
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/* Size of uCode instruction memory in bootstrap state machine */
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#define IWL_MAX_BSM_SIZE ALM_RTC_INST_SIZE
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#define IWL39_MAX_BSM_SIZE IWL39_RTC_INST_SIZE
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#define IWL39_MAX_NUM_QUEUES 8
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static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr)
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{
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return (addr >= RTC_DATA_LOWER_BOUND) &&
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(addr < ALM_RTC_DATA_UPPER_BOUND);
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return (addr >= IWL39_RTC_DATA_LOWER_BOUND) &&
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(addr < IWL39_RTC_DATA_UPPER_BOUND);
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}
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/* Base physical address of iwl3945_shared is provided to FH_TSSR_CBB_BASE
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@ -661,7 +661,7 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
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/* Convert 3945's rssi indicator to dBm */
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rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
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rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
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/* Set default noise value to -127 */
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if (priv->last_rx_noise == 0)
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@ -89,7 +89,7 @@
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#define LONG_SLOT_TIME 20
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/* RSSI to dBm */
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#define IWL_RSSI_OFFSET 44
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#define IWL49_RSSI_OFFSET 44
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@ -129,24 +129,26 @@
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/* Sizes and addresses for instruction and data memory (SRAM) in
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* 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
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#define RTC_INST_LOWER_BOUND (0x000000)
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#define IWL49_RTC_INST_LOWER_BOUND (0x000000)
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#define IWL49_RTC_INST_UPPER_BOUND (0x018000)
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#define RTC_DATA_LOWER_BOUND (0x800000)
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#define IWL49_RTC_DATA_LOWER_BOUND (0x800000)
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#define IWL49_RTC_DATA_UPPER_BOUND (0x80A000)
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#define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
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#define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
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#define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - \
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IWL49_RTC_INST_LOWER_BOUND)
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#define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - \
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IWL49_RTC_DATA_LOWER_BOUND)
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#define IWL_MAX_INST_SIZE IWL49_RTC_INST_SIZE
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#define IWL_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE
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#define IWL49_MAX_INST_SIZE IWL49_RTC_INST_SIZE
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#define IWL49_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE
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/* Size of uCode instruction memory in bootstrap state machine */
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#define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE
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#define IWL49_MAX_BSM_SIZE BSM_SRAM_SIZE
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static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr)
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{
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return (addr >= RTC_DATA_LOWER_BOUND) &&
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return (addr >= IWL49_RTC_DATA_LOWER_BOUND) &&
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(addr < IWL49_RTC_DATA_UPPER_BOUND);
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}
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@ -149,7 +149,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
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priv->ucode_type = UCODE_RT;
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/* make sure bootstrap program is no larger than BSM's SRAM size */
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if (len > IWL_MAX_BSM_SIZE)
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if (len > IWL49_MAX_BSM_SIZE)
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return -EINVAL;
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/* Tell bootstrap uCode where to find the "Initialize" uCode
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@ -186,7 +186,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
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/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
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iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
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iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
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iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
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iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
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/* Load bootstrap code into instruction SRAM now,
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@ -2246,7 +2246,7 @@ static int iwl4965_calc_rssi(struct iwl_priv *priv,
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/* dBm = max_rssi dB - agc dB - constant.
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* Higher AGC (higher radio gain) means lower signal. */
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return max_rssi - agc - IWL_RSSI_OFFSET;
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return max_rssi - agc - IWL49_RSSI_OFFSET;
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}
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@ -68,10 +68,16 @@
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#ifndef __iwl_5000_hw_h__
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#define __iwl_5000_hw_h__
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#define IWL50_RTC_INST_LOWER_BOUND (0x000000)
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#define IWL50_RTC_INST_UPPER_BOUND (0x020000)
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#define IWL50_RTC_DATA_LOWER_BOUND (0x800000)
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#define IWL50_RTC_DATA_UPPER_BOUND (0x80C000)
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#define IWL50_RTC_INST_SIZE (IWL50_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
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#define IWL50_RTC_DATA_SIZE (IWL50_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
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#define IWL50_RTC_INST_SIZE (IWL50_RTC_INST_UPPER_BOUND - \
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IWL50_RTC_INST_LOWER_BOUND)
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#define IWL50_RTC_DATA_SIZE (IWL50_RTC_DATA_UPPER_BOUND - \
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IWL50_RTC_DATA_LOWER_BOUND)
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/* EEPROM */
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#define IWL_5000_EEPROM_IMG_SIZE 2048
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@ -580,7 +580,8 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv,
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{
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int ret = 0;
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ret = iwl5000_load_section(priv, inst_image, RTC_INST_LOWER_BOUND);
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ret = iwl5000_load_section(priv, inst_image,
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IWL50_RTC_INST_LOWER_BOUND);
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if (ret)
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return ret;
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@ -600,7 +601,7 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv,
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priv->ucode_write_complete = 0;
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ret = iwl5000_load_section(
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priv, data_image, RTC_DATA_LOWER_BOUND);
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priv, data_image, IWL50_RTC_DATA_LOWER_BOUND);
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if (ret)
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return ret;
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@ -1356,7 +1357,7 @@ static void iwl5000_rx_handler_setup(struct iwl_priv *priv)
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static int iwl5000_hw_valid_rtc_data_addr(u32 addr)
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{
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return (addr >= RTC_DATA_LOWER_BOUND) &&
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return (addr >= IWL50_RTC_DATA_LOWER_BOUND) &&
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(addr < IWL50_RTC_DATA_UPPER_BOUND);
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}
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@ -1460,7 +1461,7 @@ static int iwl5000_calc_rssi(struct iwl_priv *priv,
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/* dBm = max_rssi dB - agc dB - constant.
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* Higher AGC (higher radio gain) means lower signal. */
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return max_rssi - agc - IWL_RSSI_OFFSET;
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return max_rssi - agc - IWL49_RSSI_OFFSET;
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}
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static struct iwl_hcmd_ops iwl5000_hcmd = {
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@ -1018,7 +1018,7 @@ static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IWL_DL_IO is set */
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iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
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i + RTC_INST_LOWER_BOUND);
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i + IWL49_RTC_INST_LOWER_BOUND);
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val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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ret = -EIO;
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@ -1051,7 +1051,8 @@ static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
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if (ret)
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return ret;
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iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
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iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
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IWL49_RTC_INST_LOWER_BOUND);
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errcnt = 0;
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for (; len > 0; len -= sizeof(u32), image++) {
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@ -5018,7 +5018,8 @@ static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u3
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if (rc)
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return rc;
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iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
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iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
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IWL39_RTC_INST_LOWER_BOUND);
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errcnt = 0;
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for (; len > 0; len -= sizeof(u32), image++) {
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@ -5069,7 +5070,7 @@ static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image,
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IWL_DL_IO is set */
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iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
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i + RTC_INST_LOWER_BOUND);
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i + IWL39_RTC_INST_LOWER_BOUND);
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val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image)) {
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#if 0 /* Enable this if you want to see details */
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@ -5219,7 +5220,7 @@ static int iwl3945_load_bsm(struct iwl3945_priv *priv)
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IWL_DEBUG_INFO("Begin load bsm\n");
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/* make sure bootstrap program is no larger than BSM's SRAM size */
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if (len > IWL_MAX_BSM_SIZE)
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if (len > IWL39_MAX_BSM_SIZE)
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return -EINVAL;
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/* Tell bootstrap uCode where to find the "Initialize" uCode
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@ -5257,7 +5258,7 @@ static int iwl3945_load_bsm(struct iwl3945_priv *priv)
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/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
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iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
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iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
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RTC_INST_LOWER_BOUND);
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IWL39_RTC_INST_LOWER_BOUND);
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iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
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/* Load bootstrap code into instruction SRAM now,
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@ -5401,32 +5402,32 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv)
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}
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/* Verify that uCode images will fit in card's SRAM */
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if (inst_size > IWL_MAX_INST_SIZE) {
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if (inst_size > IWL39_MAX_INST_SIZE) {
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IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
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inst_size);
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ret = -EINVAL;
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goto err_release;
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}
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if (data_size > IWL_MAX_DATA_SIZE) {
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if (data_size > IWL39_MAX_DATA_SIZE) {
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IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
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data_size);
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ret = -EINVAL;
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goto err_release;
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}
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if (init_size > IWL_MAX_INST_SIZE) {
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if (init_size > IWL39_MAX_INST_SIZE) {
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IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
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init_size);
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ret = -EINVAL;
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goto err_release;
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}
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if (init_data_size > IWL_MAX_DATA_SIZE) {
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if (init_data_size > IWL39_MAX_DATA_SIZE) {
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IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
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init_data_size);
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ret = -EINVAL;
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goto err_release;
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}
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if (boot_size > IWL_MAX_BSM_SIZE) {
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if (boot_size > IWL39_MAX_BSM_SIZE) {
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IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
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boot_size);
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ret = -EINVAL;
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