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powerpc/xics: Rename the map handler in a check handler
This moves the IRQ initialization done under the different ICS backends in the common part of XICS. The 'map' handler becomes a simple 'check' on the HW IRQ at the FW level. As we don't need an ICS anymore in xics_migrate_irqs_away(), the XICS domain does not set a chip data for the IRQ. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210701132750.1475580-18-clg@kaod.org
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@ -89,10 +89,11 @@ static inline int ics_opal_init(void) { return -ENODEV; }
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/* ICS instance, hooked up to chip_data of an irq */
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struct ics {
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struct list_head link;
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int (*map)(struct ics *ics, unsigned int virq);
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int (*check)(struct ics *ics, unsigned int hwirq);
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void (*mask_unknown)(struct ics *ics, unsigned long vec);
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long (*get_server)(struct ics *ics, unsigned long vec);
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int (*host_match)(struct ics *ics, struct device_node *node);
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struct irq_chip *chip;
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char data[];
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};
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@ -131,19 +131,15 @@ static struct irq_chip ics_native_irq_chip = {
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.irq_retrigger = xics_retrigger,
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};
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static int ics_native_map(struct ics *ics, unsigned int virq)
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static int ics_native_check(struct ics *ics, unsigned int hw_irq)
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{
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unsigned int vec = (unsigned int)virq_to_hw(virq);
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struct ics_native *in = to_ics_native(ics);
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pr_devel("%s: vec=0x%x\n", __func__, vec);
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pr_devel("%s: hw_irq=0x%x\n", __func__, hw_irq);
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if (vec < in->ibase || vec >= (in->ibase + in->icount))
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if (hw_irq < in->ibase || hw_irq >= (in->ibase + in->icount))
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return -EINVAL;
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irq_set_chip_and_handler(virq, &ics_native_irq_chip, handle_fasteoi_irq);
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irq_set_chip_data(virq, ics);
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return 0;
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}
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@ -177,10 +173,11 @@ static int ics_native_host_match(struct ics *ics, struct device_node *node)
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}
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static struct ics ics_native_template = {
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.map = ics_native_map,
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.check = ics_native_check,
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.mask_unknown = ics_native_mask_unknown,
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.get_server = ics_native_get_server,
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.host_match = ics_native_host_match,
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.chip = &ics_native_irq_chip,
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};
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static int __init ics_native_add_one(struct device_node *np)
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@ -157,26 +157,13 @@ static struct irq_chip ics_opal_irq_chip = {
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.irq_retrigger = xics_retrigger,
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};
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static int ics_opal_map(struct ics *ics, unsigned int virq);
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static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec);
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static long ics_opal_get_server(struct ics *ics, unsigned long vec);
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static int ics_opal_host_match(struct ics *ics, struct device_node *node)
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{
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return 1;
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}
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/* Only one global & state struct ics */
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static struct ics ics_hal = {
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.map = ics_opal_map,
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.mask_unknown = ics_opal_mask_unknown,
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.get_server = ics_opal_get_server,
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.host_match = ics_opal_host_match,
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};
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static int ics_opal_map(struct ics *ics, unsigned int virq)
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static int ics_opal_check(struct ics *ics, unsigned int hw_irq)
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{
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unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
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int64_t rc;
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__be16 server;
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int8_t priority;
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@ -189,9 +176,6 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
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if (rc != OPAL_SUCCESS)
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return -ENXIO;
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irq_set_chip_and_handler(virq, &ics_opal_irq_chip, handle_fasteoi_irq);
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irq_set_chip_data(virq, &ics_hal);
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return 0;
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}
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@ -222,6 +206,15 @@ static long ics_opal_get_server(struct ics *ics, unsigned long vec)
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return ics_opal_unmangle_server(be16_to_cpu(server));
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}
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/* Only one global & state struct ics */
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static struct ics ics_hal = {
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.check = ics_opal_check,
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.mask_unknown = ics_opal_mask_unknown,
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.get_server = ics_opal_get_server,
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.host_match = ics_opal_host_match,
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.chip = &ics_opal_irq_chip,
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};
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int __init ics_opal_init(void)
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{
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if (!firmware_has_feature(FW_FEATURE_OPAL))
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@ -24,19 +24,6 @@ static int ibm_set_xive;
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static int ibm_int_on;
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static int ibm_int_off;
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static int ics_rtas_map(struct ics *ics, unsigned int virq);
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static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec);
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static long ics_rtas_get_server(struct ics *ics, unsigned long vec);
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static int ics_rtas_host_match(struct ics *ics, struct device_node *node);
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/* Only one global & state struct ics */
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static struct ics ics_rtas = {
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.map = ics_rtas_map,
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.mask_unknown = ics_rtas_mask_unknown,
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.get_server = ics_rtas_get_server,
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.host_match = ics_rtas_host_match,
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};
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static void ics_rtas_unmask_irq(struct irq_data *d)
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{
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unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
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@ -169,9 +156,8 @@ static struct irq_chip ics_rtas_irq_chip = {
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.irq_retrigger = xics_retrigger,
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};
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static int ics_rtas_map(struct ics *ics, unsigned int virq)
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static int ics_rtas_check(struct ics *ics, unsigned int hw_irq)
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{
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unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
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int status[2];
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int rc;
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@ -183,9 +169,6 @@ static int ics_rtas_map(struct ics *ics, unsigned int virq)
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if (rc)
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return -ENXIO;
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irq_set_chip_and_handler(virq, &ics_rtas_irq_chip, handle_fasteoi_irq);
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irq_set_chip_data(virq, &ics_rtas);
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return 0;
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}
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@ -213,6 +196,15 @@ static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
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return !of_device_is_compatible(node, "chrp,iic");
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}
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/* Only one global & state struct ics */
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static struct ics ics_rtas = {
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.check = ics_rtas_check,
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.mask_unknown = ics_rtas_mask_unknown,
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.get_server = ics_rtas_get_server,
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.host_match = ics_rtas_host_match,
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.chip = &ics_rtas_irq_chip,
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};
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__init int ics_rtas_init(void)
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{
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ibm_get_xive = rtas_token("ibm,get-xive");
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@ -318,10 +318,10 @@ static struct irq_chip xics_ipi_chip = {
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.irq_unmask = xics_ipi_unmask,
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};
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static int xics_host_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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static int xics_host_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq)
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{
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pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
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pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hwirq);
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/*
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* Mark interrupts as edge sensitive by default so that resend
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@ -331,7 +331,7 @@ static int xics_host_map(struct irq_domain *h, unsigned int virq,
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irq_clear_status_flags(virq, IRQ_LEVEL);
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/* Don't call into ICS for IPIs */
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if (hw == XICS_IPI) {
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if (hwirq == XICS_IPI) {
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irq_set_chip_and_handler(virq, &xics_ipi_chip,
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handle_percpu_irq);
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return 0;
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@ -340,10 +340,13 @@ static int xics_host_map(struct irq_domain *h, unsigned int virq,
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if (WARN_ON(!xics_ics))
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return -EINVAL;
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/* Let the ICS setup the chip data */
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if (xics_ics->map(xics_ics, virq))
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if (xics_ics->check(xics_ics, hwirq))
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return -EINVAL;
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/* No chip data for the XICS domain */
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irq_domain_set_info(domain, virq, hwirq, xics_ics->chip,
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NULL, handle_fasteoi_irq, NULL, NULL);
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return 0;
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}
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