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dma-coherent: remove the DMA_MEMORY_MAP and DMA_MEMORY_IO flags
DMA_MEMORY_IO was never used in the tree, so remove it. That means there is no need for the DMA_MEMORY_MAP flag either now, so remove it as well and change dma_declare_coherent_memory to return a normal errno value. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Marek Szyprowski <m.szyprowski@samsung.com>
This commit is contained in:
parent
b32dbc1e0b
commit
2436bdcda5
@ -592,30 +592,11 @@ size is the size of the area (must be multiples of PAGE_SIZE).
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flags can be ORed together and are:
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flags can be ORed together and are:
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- DMA_MEMORY_MAP - request that the memory returned from
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dma_alloc_coherent() be directly writable.
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- DMA_MEMORY_IO - request that the memory returned from
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dma_alloc_coherent() be addressable using read()/write()/memcpy_toio() etc.
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One or both of these flags must be present.
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- DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
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- DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
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Do not allow dma_alloc_coherent() to fall back to system memory when
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Do not allow dma_alloc_coherent() to fall back to system memory when
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it's out of memory in the declared region.
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it's out of memory in the declared region.
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The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
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As a simplification for the platforms, only *one* such region of
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must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
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if only DMA_MEMORY_MAP were passed in) for success or zero for
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failure.
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Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
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dma_alloc_coherent() may no longer be accessed directly, but instead
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must be accessed using the correct bus functions. If your driver
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isn't prepared to handle this contingency, it should not specify
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DMA_MEMORY_IO in the input flags.
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As a simplification for the platforms, only **one** such region of
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memory may be declared per device.
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memory may be declared per device.
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For reasons of efficiency, most platforms choose to track the declared
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For reasons of efficiency, most platforms choose to track the declared
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@ -245,7 +245,6 @@ static phys_addr_t mx2_camera_base __initdata;
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static void __init visstrim_analog_camera_init(void)
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static void __init visstrim_analog_camera_init(void)
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{
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{
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struct platform_device *pdev;
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struct platform_device *pdev;
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int dma;
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gpio_set_value(TVP5150_PWDN, 1);
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gpio_set_value(TVP5150_PWDN, 1);
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ndelay(1);
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ndelay(1);
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@ -258,12 +257,9 @@ static void __init visstrim_analog_camera_init(void)
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if (IS_ERR(pdev))
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if (IS_ERR(pdev))
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return;
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return;
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dma = dma_declare_coherent_memory(&pdev->dev,
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dma_declare_coherent_memory(&pdev->dev, mx2_camera_base,
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mx2_camera_base, mx2_camera_base,
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mx2_camera_base, MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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return;
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}
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}
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static void __init visstrim_reserve(void)
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static void __init visstrim_reserve(void)
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@ -444,16 +440,13 @@ static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
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static void __init visstrim_coda_init(void)
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static void __init visstrim_coda_init(void)
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{
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{
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struct platform_device *pdev;
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struct platform_device *pdev;
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int dma;
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pdev = imx27_add_coda();
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pdev = imx27_add_coda();
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dma = dma_declare_coherent_memory(&pdev->dev,
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dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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return;
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}
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}
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/* DMA deinterlace */
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/* DMA deinterlace */
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@ -466,24 +459,21 @@ static void __init visstrim_deinterlace_init(void)
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{
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{
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int ret = -ENOMEM;
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int ret = -ENOMEM;
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struct platform_device *pdev = &visstrim_deinterlace;
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struct platform_device *pdev = &visstrim_deinterlace;
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int dma;
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ret = platform_device_register(pdev);
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ret = platform_device_register(pdev);
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dma = dma_declare_coherent_memory(&pdev->dev,
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dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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return;
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}
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}
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/* Emma-PrP for format conversion */
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/* Emma-PrP for format conversion */
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static void __init visstrim_emmaprp_init(void)
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static void __init visstrim_emmaprp_init(void)
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{
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{
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struct platform_device *pdev;
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struct platform_device *pdev;
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int dma;
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int ret;
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pdev = imx27_add_mx2_emmaprp();
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pdev = imx27_add_mx2_emmaprp();
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if (IS_ERR(pdev))
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if (IS_ERR(pdev))
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@ -493,11 +483,11 @@ static void __init visstrim_emmaprp_init(void)
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* Use the same memory area as the analog camera since both
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* Use the same memory area as the analog camera since both
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* devices are, by nature, exclusive.
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* devices are, by nature, exclusive.
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*/
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*/
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dma = dma_declare_coherent_memory(&pdev->dev,
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ret = dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base, mx2_camera_base,
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mx2_camera_base, mx2_camera_base,
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MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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if (ret)
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pr_err("Failed to declare memory for emmaprp\n");
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pr_err("Failed to declare memory for emmaprp\n");
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}
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}
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@ -475,7 +475,7 @@ static phys_addr_t mx3_camera_base __initdata;
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static int __init mx31moboard_init_cam(void)
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static int __init mx31moboard_init_cam(void)
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{
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{
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int dma, ret = -ENOMEM;
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int dma, ret;
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struct platform_device *pdev;
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struct platform_device *pdev;
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imx31_add_ipu_core();
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imx31_add_ipu_core();
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@ -484,11 +484,11 @@ static int __init mx31moboard_init_cam(void)
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if (IS_ERR(pdev))
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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return PTR_ERR(pdev);
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dma = dma_declare_coherent_memory(&pdev->dev,
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ret = dma_declare_coherent_memory(&pdev->dev,
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mx3_camera_base, mx3_camera_base,
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mx3_camera_base, mx3_camera_base,
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MX3_CAMERA_BUF_SIZE,
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MX3_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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if (ret)
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goto err;
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goto err;
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ret = platform_device_add(pdev);
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ret = platform_device_add(pdev);
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@ -63,11 +63,10 @@ static void gapspci_fixup_resources(struct pci_dev *dev)
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res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
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res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
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res.flags = IORESOURCE_MEM;
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res.flags = IORESOURCE_MEM;
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pcibios_resource_to_bus(dev->bus, ®ion, &res);
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pcibios_resource_to_bus(dev->bus, ®ion, &res);
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BUG_ON(!dma_declare_coherent_memory(&dev->dev,
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BUG_ON(dma_declare_coherent_memory(&dev->dev,
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res.start,
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res.start,
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region.start,
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region.start,
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resource_size(&res),
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resource_size(&res),
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DMA_MEMORY_MAP |
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DMA_MEMORY_EXCLUSIVE));
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DMA_MEMORY_EXCLUSIVE));
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break;
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break;
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default:
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default:
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@ -46,15 +46,10 @@ static bool dma_init_coherent_memory(
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int pages = size >> PAGE_SHIFT;
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int pages = size >> PAGE_SHIFT;
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int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
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int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
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if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0)
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goto out;
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if (!size)
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if (!size)
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goto out;
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goto out;
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if (flags & DMA_MEMORY_MAP)
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mem_base = memremap(phys_addr, size, MEMREMAP_WC);
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mem_base = memremap(phys_addr, size, MEMREMAP_WC);
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else
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mem_base = ioremap(phys_addr, size);
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if (!mem_base)
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if (!mem_base)
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goto out;
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goto out;
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@ -77,12 +72,8 @@ static bool dma_init_coherent_memory(
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out:
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out:
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kfree(dma_mem);
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kfree(dma_mem);
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if (mem_base) {
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if (mem_base)
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if (flags & DMA_MEMORY_MAP)
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memunmap(mem_base);
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memunmap(mem_base);
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else
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iounmap(mem_base);
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}
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return false;
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return false;
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}
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}
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@ -91,10 +82,7 @@ static void dma_release_coherent_memory(struct dma_coherent_mem *mem)
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if (!mem)
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if (!mem)
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return;
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return;
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if (mem->flags & DMA_MEMORY_MAP)
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memunmap(mem->virt_base);
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memunmap(mem->virt_base);
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else
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iounmap(mem->virt_base);
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kfree(mem->bitmap);
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kfree(mem->bitmap);
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kfree(mem);
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kfree(mem);
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}
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}
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@ -116,16 +104,16 @@ int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags)
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dma_addr_t device_addr, size_t size, int flags)
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{
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{
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struct dma_coherent_mem *mem;
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struct dma_coherent_mem *mem;
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int ret;
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if (!dma_init_coherent_memory(phys_addr, device_addr, size, flags,
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ret = dma_init_coherent_memory(phys_addr, device_addr, size, flags, &mem);
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&mem))
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if (ret)
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return 0;
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return ret;
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if (dma_assign_coherent_memory(dev, mem) == 0)
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ret = dma_assign_coherent_memory(dev, mem);
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return flags & DMA_MEMORY_MAP ? DMA_MEMORY_MAP : DMA_MEMORY_IO;
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if (ret)
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dma_release_coherent_memory(mem);
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dma_release_coherent_memory(mem);
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return ret;
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return 0;
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}
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}
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EXPORT_SYMBOL(dma_declare_coherent_memory);
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EXPORT_SYMBOL(dma_declare_coherent_memory);
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@ -186,15 +174,9 @@ static void *__dma_alloc_from_coherent(struct dma_coherent_mem *mem,
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*/
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*/
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*dma_handle = mem->device_base + (pageno << PAGE_SHIFT);
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*dma_handle = mem->device_base + (pageno << PAGE_SHIFT);
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ret = mem->virt_base + (pageno << PAGE_SHIFT);
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ret = mem->virt_base + (pageno << PAGE_SHIFT);
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dma_memory_map = (mem->flags & DMA_MEMORY_MAP);
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spin_unlock_irqrestore(&mem->spinlock, flags);
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spin_unlock_irqrestore(&mem->spinlock, flags);
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if (dma_memory_map)
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memset(ret, 0, size);
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memset(ret, 0, size);
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else
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memset_io(ret, 0, size);
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return ret;
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return ret;
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err:
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err:
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spin_unlock_irqrestore(&mem->spinlock, flags);
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spin_unlock_irqrestore(&mem->spinlock, flags);
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return NULL;
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return NULL;
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@ -360,7 +342,7 @@ static int rmem_dma_device_init(struct reserved_mem *rmem, struct device *dev)
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if (!mem &&
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if (!mem &&
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!dma_init_coherent_memory(rmem->base, rmem->base, rmem->size,
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!dma_init_coherent_memory(rmem->base, rmem->base, rmem->size,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE,
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DMA_MEMORY_EXCLUSIVE,
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&mem)) {
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&mem)) {
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pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %ld MiB\n",
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pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %ld MiB\n",
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&rmem->base, (unsigned long)rmem->size / SZ_1M);
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&rmem->base, (unsigned long)rmem->size / SZ_1M);
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@ -176,13 +176,10 @@ int dmam_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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rc = dma_declare_coherent_memory(dev, phys_addr, device_addr, size,
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rc = dma_declare_coherent_memory(dev, phys_addr, device_addr, size,
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flags);
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flags);
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if (rc) {
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if (!rc)
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devres_add(dev, res);
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devres_add(dev, res);
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rc = 0;
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else
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} else {
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devres_free(res);
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devres_free(res);
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rc = -ENOMEM;
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}
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return rc;
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return rc;
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}
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}
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@ -1708,11 +1708,10 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
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err = dma_declare_coherent_memory(&pdev->dev, res->start,
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err = dma_declare_coherent_memory(&pdev->dev, res->start,
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res->start,
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res->start,
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resource_size(res),
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resource_size(res),
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DMA_MEMORY_MAP |
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DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE);
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if (!err) {
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if (err) {
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dev_err(&pdev->dev, "Unable to declare CEU memory.\n");
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dev_err(&pdev->dev, "Unable to declare CEU memory.\n");
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return -ENXIO;
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return err;
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}
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}
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pcdev->video_limit = resource_size(res);
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pcdev->video_limit = resource_size(res);
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@ -217,8 +217,7 @@ NCR_Q720_probe(struct device *dev)
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}
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}
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if (dma_declare_coherent_memory(dev, base_addr, base_addr,
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if (dma_declare_coherent_memory(dev, base_addr, base_addr,
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mem_size, DMA_MEMORY_MAP)
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mem_size, 0)) {
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!= DMA_MEMORY_MAP) {
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printk(KERN_ERR "NCR_Q720: DMA declare memory failed\n");
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printk(KERN_ERR "NCR_Q720: DMA declare memory failed\n");
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goto out_release_region;
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goto out_release_region;
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}
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}
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@ -123,13 +123,12 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev)
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* regular memory. The HCD_LOCAL_MEM flag does just that.
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* regular memory. The HCD_LOCAL_MEM flag does just that.
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*/
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*/
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if (!dma_declare_coherent_memory(dev, mem->start,
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retval = dma_declare_coherent_memory(dev, mem->start,
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mem->start - mem->parent->start,
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mem->start - mem->parent->start,
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resource_size(mem),
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resource_size(mem),
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DMA_MEMORY_MAP |
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DMA_MEMORY_EXCLUSIVE);
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DMA_MEMORY_EXCLUSIVE)) {
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if (retval) {
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dev_err(dev, "cannot declare coherent memory\n");
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dev_err(dev, "cannot declare coherent memory\n");
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retval = -ENXIO;
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goto err1;
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goto err1;
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}
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}
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@ -227,13 +227,10 @@ static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
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goto err_ioremap_regs;
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goto err_ioremap_regs;
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}
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}
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if (!dma_declare_coherent_memory(&dev->dev, sram->start,
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ret = dma_declare_coherent_memory(&dev->dev, sram->start, sram->start,
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sram->start,
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resource_size(sram), DMA_MEMORY_EXCLUSIVE);
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resource_size(sram),
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if (ret)
|
||||||
DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) {
|
|
||||||
ret = -EBUSY;
|
|
||||||
goto err_dma_declare;
|
goto err_dma_declare;
|
||||||
}
|
|
||||||
|
|
||||||
if (cell->enable) {
|
if (cell->enable) {
|
||||||
ret = cell->enable(dev);
|
ret = cell->enable(dev);
|
||||||
|
@ -694,9 +694,7 @@ static inline int dma_get_cache_alignment(void)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* flags for the coherent memory api */
|
/* flags for the coherent memory api */
|
||||||
#define DMA_MEMORY_MAP 0x01
|
#define DMA_MEMORY_EXCLUSIVE 0x01
|
||||||
#define DMA_MEMORY_IO 0x02
|
|
||||||
#define DMA_MEMORY_EXCLUSIVE 0x04
|
|
||||||
|
|
||||||
#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
|
#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
|
||||||
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
||||||
@ -709,7 +707,7 @@ static inline int
|
|||||||
dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
||||||
dma_addr_t device_addr, size_t size, int flags)
|
dma_addr_t device_addr, size_t size, int flags)
|
||||||
{
|
{
|
||||||
return 0;
|
return -ENOSYS;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
|
Loading…
Reference in New Issue
Block a user